Viresh Paruthi is a Technical Leader for Formal Verification Application at IBM's System and Technology group. In his role, Viresh is responsible for directing formal verification methodology, strategic direction and execution on microprocessor projects. Prior to this Viresh assumed a central role in the research, design and development of SixthSense, IBM's formal and semi-formal verification toolset and sequential equivalence checker, and Verity, IBM's combinational equivalence checker, and contributed to defining methodologies leveraging these tools and technologies. Viresh has filed large number of patents and published numerous conference papers in the area of formal verification.