Join us in May when Madhavan Swaminathan presents; Designing for Power Integrity: Status, Challenges and Opportunities

 

Since the mid-1990s, designers have been developing sophisticated methods for managing power integrity in packages and printed circuit boards which has had a direct impact on the signal integrity of systems. These have included items such as developing design parameters such as target impedance, developing repeatable frequency domain characterization methods, pushing the EDA vendors to improve the capability of the design tools, developing new devices such as EBGs to improve isolation, developing embedded capacitance layers to name a few. However, the designers are continuing to face challenges where the noise on the power distribution is beginning to over shadow the signals in fast switching environments arising in high speed computing systems. These challenges are often times opportunities for university research that can lead to interesting and often times innovative solutions.

 

This talk will cover a review of the past developments in this area and will focus on the present challenges and potential solutions in the area of power delivery.