Abstract

Increasing variability in deep sub micron technologies has become a critical issue in nanometer digital design (below 100 nm). A good understanding of the sources and nature of process variation is key to accurately simulating their impact design. We will examine first the sources of variations and how these variations can be modeled for statistical analysis. Statistical timing addresses the analysis of digital design under both process and environmental variations. Discussion on the algorithmic approaches to efficient SSTA will be covered. We will look into how the propagation of a delay distribution through a circuit can be computed properly. We will also discuss requirements on the characterization and extraction of statistical data in the fabrication lines and they should feed statistical analysis tools.