Abstract

Using Thermal Analysis as a Tool to Aid Analog Floorplanning
Todays' IC designers are being driven to reduce area and increase performance and power-efficiency. Local circuit temperature can affect circuit performance, speed and current consumption, as well create reliability problems like electro-migration and thermal-runaway. Temperature can be an engineered parameter, like voltage current, or resistance; instead of the traditional "seat of the pants" guess-temics. Design can be done without impacting reliability or performance, by looking at thermal maps of the circuit, thus aiding the floor-planning process to reduce temperatures, allowing transistors to operate in potentially more usable regions or to reduce temperature deltas in sensitive areas of the design; this can translate to lower operating currents, meaning greater efficiency. Since electro-migration is a function of temperature, current densities in metal traces are typically derated at higher temperatures. Lowering the operating temperature can mean narrower power traces, potentially reducing interconnect parasitics, or improved reliability. The presentation will show results from using Gradient Design Automation's CircuitFire to iterate placement of the transistors in a 1.9GHz 24dBM power amplifier, and the resulting effect on (predicted) operating temperature, and PA power efficiency.