Upcoming Events:
December 10, 2009 Event--IEEE CAS Distinguished Lecturer
6:30pm: Networking/Pizza Social
7:00pm: Announcement
7:05pm: Presentation
8:15pm: Adjourn
Cost: Free. $2 donation accepted for food.
Location: Cadence Design Systems, Building 5
Title
Cost effective low power IP designs for mobile communications
Speaker
Dr. Myung H. Sunwoo (Professor, Ajou University, Suwon, Korea.)
Abstract
The talk presents four low power high speed SOC IP designs for communication systems. First, a new continuous flow mixed-radix (CFMR) FFT processor is presented, which uses the mixed-radix (radix-4/2) algorithm and an in-place memory strategy to reduce area. CFMR can support three schemes, mixed-radix, in-place, and continuous flow, at the same time.
Second, a new low-cost and high-speed Reed-Solomon (RS) decoder based on the proposed Simplified Euclid’s (OE) algorithm is presented, which can remove the degree computations and comparisons. The proposed RS decoder can has the shortest critical path and the least gate count compared with the existing RS decoders.
Third, a novel Digital Signal Processing (DSP) unit for a Gigabit Ethernet receiver is presented. The proposed baseline wander (BLW) compensator implemented in a digital domain uses four symbols and can remove even large BLW. Hence, it improves the MSE performance about 1dB compared with the existing BLW compensator.
Finally, a baseband digital demodulator for Digital Video Broadcasting – Satellite second generation (DVB-S2) is presented. The proposed demodulator can estimate ±5MHz frequency offset at low SNR. Moreover, the carrier frequency estimator can reduce the hardware complexity by using serial correlators.
Biography
Myung H. Sunwoo is a Distinguished Lecturer of the IEEE Circuit and System Society since 2009. He received the B.S. degree from the Sogang University in 1980, the M.S. degree from the Korea Advanced Institute of Science and Technology in 1982, and the Ph.D. degree in Electrical and Computer Engineering from the University of Texas at Austin in 1990.
He worked for Electronics and Telecommunications Research Institute in Daejeon, Korea from 1982 to 1985, and Motorola in Austin, Texas from 1990 to 1992. Since 1992, he has been Professor in the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea. In 2000, he was Visiting Professor in the Department of Electrical and Computer Engineering, the University of California, Davis, CA, USA.
He has authored over 350 papers and also holds 43 patents. He received 28 research awards including Best Paper Awards from the IEEE Workshop on Signal Processing Systems (SiPS) in 2005, International SOC Conference (ISOCC) in 2003, 2005, 2008, 2009, and IEEE Seoul Section in 2004. His research interests include SOC architectures, SOC design for multimedia and communications, and application-specific design.
He will serve as General Chair of ISCAS2012 in Incheon, Korea. He served as Technical Program Chair (IEEE SiPS 2003) and General Co-Chair (IEEE ISOCC 2008). He has been a member of TPC for numerous conferences and societies (IEEE SiPS, Cool Chips, DATE, A-SSCC, APCCAS, BioCAS, VLSI- DAT), Associate Editor (IEEE Trans VLSI systems, 2002-2003), Guest Editor (Journal of VLSI Signal Processing Systems, Springer, 2004, 2010) and Vice President of the Institute of Electronics Engineers of Korea (IEEK) Semiconductor Society. He is listed in MARQUIS Who’s Who in the World, in Science and Engineering, in Asia and International Biographical Centre.
He has been Director of the National Research Laboratory sponsored by the Ministry of Science and Technology, Director of the New Growth Engine Semiconductor Center, Executive Director of IEEK, and Chair of the IEEK SOC Technical Committee. Currently, he has been an honorary ambassador of Korean Tourism Organization. He is a Senior Member of IEEE and Chair of the IEEE CAS Society Seoul Chapter.
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