Promoted event
Bio-informatics and Bio-signal Processing Workshop
Computer Society is promoting the Bio-informatics and Bio-signal Processing Workshop, sponsored by Signal Processing Society. The workshop is held on Aug 30 at Santa Clara University. Anyone is welcome to attend, and registration fee is very economical. Below are topics and speakers at a glance.
Speaker: Dr. Craig Stephens, Santa Clara University
Speaker: Dr. Sami Khuri, San Jose State University
Speaker: Dr. Byung-Jun Yoon, Texas A&M University, College Station, TX
Speaker: Dr. Ru-Fang Yeh, University of California San Francisco
Please visit workshop website for registration and detailed workshop program: https://ewh.ieee.org/r6/scv/sps/bioSPS/
Registration fee for IEEE members is only $40 before Aug 20 and $50 after Aug 20. (Lowered student reg. fee also available.) Take advantage of the early registration special to save on the fee.
============================
Co-sponsor with IEEE SCV Monterey Bay Subsection
Parallel Computing with CUDA on GPUs
Speakers: Dr. John Nichols and Dr. Massimiliano Fatica, Nvidia Corporation.
Abstract: The CUDA parallel programming model provides a straightforward means of describing inherently parallel computations. It lets programmers write scalable parallel programs with a minimal extension of the C language. NVIDIA's Tesla GPU architecture delivers high computational throughput on massively parallel problems. This talk describes how to write CUDA C programs, outlines the parallel computing architecture of a 240-processor GPU, and surveys applications of CUDA to different problems and the parallel speedups obtained on GPUs over traditional sequential CPU codes.
Biographies of Speakers:
John Nickolls, Ph.D., Director of Architecture, NVIDIA Corporation.
John Nickolls is director of architecture at NVIDIA for GPU computing. He was previously with Broadcom, Silicon Spice, Sun Microsystems, and was a co-founder of MasPar Computer. His interests include parallel processing systems, languages, and architectures. Nickolls has a BS in electrical engineering and computer science from the University of Illinois, and MS and PhD degrees in electrical engineering from Stanford University.
Massimiliano Fatica, Ph.D., NVIDIA Corporation.
Massimiliano Fatica is a Senior Applied Engineer at NVIDIA where he works in the area of GPU computing (high-performance computing and clusters). Prior to joining NVIDIA, he was a research staff member at Stanford University where he worked on applications for the Stanford Streaming Supercomputer. He holds a laurea in Aeronautical Engineering and a PhD in Theoretical and Applied Mechanics from the University of Rome "La Sapienza".
Date: Wed., Oct. 1, 2008.
Time: 6:00 pm - Refreshments, Food, and Social Time, 7:00pm - Technical Presentation
Place: Simularium Room at the University of California in Santa Cruz Room 180, Engineering Bldg 2.
Registration: email Marcelo Siero at siero@ee.com if you plan to attend. Attendance count is needed to order food.
Directions: driving to the campus and map of the SCSC campus of the Jack Baskin Engineering Building
When you arrive on the campus, proceed on Coolidge Drive following the main road onto McLaughlin Drive, turn left onto Heller Drive, then left again into the multi-level "West Core Parking" Structure (the closest parking to Baskin Engineering). The Simularium is off the courtyard lying between Baskin (E1) and Engineering 2 (E2) buildings.
Cost: Two dollars to park your car at the Core West Parking Structure