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Meeting and Seminar Archive:

(Co-sponsored Distinguished Lecture with SCV CAS and MTT chapters)

Date:  Nov 3, 2008

Title: Design Techniques and CMOS Implementation of Low Noise Amplifier (LNA)

Speaker: Prof S. S. Jamuar

Location: Cadence Design Systems, Building 5, 655 Seely Avenue, San Jose, CA, 95134


The rapid growth of portable RF communication systems in various standards has led to the demand for one chip to cover several standards such as WCDMA, WLAN, GSM etc. This leads to the stringent requirements for the RF front-end to cover a large range of different carrier frequencies for all standards. A receiver system consists of the following circuits: a low noise amplifier, mixer, voltage-controlled oscillator (VCO), intermediate frequency (IF) amplifier and filters. The low noise amplifier (LNA) is typically the first active stage for the RF front-end. Its main function is to amplify low signals without adding noise, thus preserving the signal-to-noise ratio (SNR) of the system at low power consumption. Many tradeoffs are involved in designing the LNA such as noise figure (NF), linearity, gain, impedance matching and power dissipation. Therefore, proper LNA design considerations and techniques are crucial in today’s communications technology.

This lecture places an emphasis on improved design techniques for the low noise amplifier (LNA). DC biasing techniques, impedance matching techniques, noise matching and stability analysis will be discussed. Voltage mode design and current mode design techniques will be elaborated. Variable gain low noise amplifier design techniques will also be discussed. All the design techniques and simulations presented in the tutorial will be based on EDA tools.


Prof. S. S. Jamuar received his M. Tech and Ph. D. in Electrical Engineering from Indian Institute of Technology, Kanpur, India in 1970 and 1977 respectively. He worked as Research Assistant, Senior Research Fellow and Senior Research Assistant from 1969 to 1975 at IIT Kanpur. During 1975-76, he was with Hindustan Aeronautics Ltd., Lucknow. Subsequently he joined the Lasers and Spectroscopy Group in the Physics Department at IIT Kanpur, where he was involved in the design of various types of Laser Systems. He joined as Lecturer Electrical Engineering Department at Indian Institute of Technology Delhi in 1977, where he became Assistant Professor in 1980. He was attached to Bath College of Further Education, Bath (UK), Aalborg University, Aalborg (Denmark) during 1987 and 2000. He was a Professor in the Department of Electrical Engineering at IIT Delhi from 1991 to 2003. He was Consultant to UNESCO during 1996 in Lagos State University, Lagos (Nigeria). He was with University Putra Malaysia during 1996-97 in the Faculty of Engineering. Presently he is Professor in the Electrical and Electronic Engineering Department in the Faculty of Engineering, University Putra Malaysia (Malaysia) since 2001. He has been teaching and conducting research in the areas of Electronic Circuit Design, Instrumentation and Communication Systems. He has about 40 papers in the International Journals and has attended several International Conferences and presented papers. He recently received Taiwan Patent on Simulation Circuit Layout Design for Low Voltage, Low Power and High Performance Type II Current Conveyor. He is recipient of Meghnad Saha Memorial Award 1976 from IETE, . Distinguished Alumni Award from BIT Sindri in 1999, Best paper award in IETE journal of Education 2004 from IETE. He is senior member of IEEE and Fellow of Institution of Electronics and Telecommunications Engineering (India). He is on the Editorial Board of Wireless Personnel Communication Journal. He is presently the Chapter Chair for IEEE CAS Chapter in Malaysia. He is one of DLP speakers for the term 2008-2009 for the IEEE Circuits and System Society.

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