With the advancement of CMOS technology, IC designers are faced with new challenges in nanometer design. Both active and leakage power are significantly increased by an order of magnitude, leading to serious thermal crisis. Moreover, as the geometry size continues to shrink to nanometer range where device characteristics and circuit performances are dominated by physical layout, design for manufacture/yield becomes critical and a necessity in modern IC design flow. Furthermore, signal integrity is no longer limited to crosstalk only. Electromigration, stress migration and transmission line effects are also important and need to be taken into consideration early in the design cycle. This presentation gives an overview of the major nanometer design challenges as well as general solutions to them.

Oscar M.K. Law (S’85-M’93) was born in Hong Kong. He received the B.Eng. and M.Eng. degree in electrical and computer engineering from McMaster University, Canada, in 1987 and 1990, and the Ph.D. degree in electrical and computer engineering from University of Toronto in 1995. From 1987 to 1990, he worked in the area of high speed digital signal processing applications at the Communications Research Laboratory, McMaster University. From 1991 to 1995, he engaged in GaAs digital integrated circuits design at the Integrated Circuits Laboratory, University of Toronto. Currently, he is a senior staff engineer at ATI Technologies Inc. His current research and interest focus on integrated circuits design challenges in nanometer technology, including power optimization, leakage reduction, signal integrity, design for manufacture/yield and thermal studies.