Seminar Announcement
These events are organized by various sub-sets of the IEEE Toronto Section.
The contact person listed below is the volunteer who has arranged this event.
Please use the e-mail link provided if you have any questions, suggestions,
or concerns.
| Titles
|
Clock and Data Recovery in High-Speed Wireline Communications
(slides) |
| Speaker
|
Dr. Nikola Nedovic
Fujitsu Laboratories of America
Sunnyvale, California
|
| Day and Time
|
Thursday, May 15, 2008, 4:00 p.m. – 5:00 p.m.
|
| Location |
Room BA 1210
Bahen Centre
for Information Technology
University of Toronto - St. George Campus
40 St. George Street map - code BA |
| Organizer
|
Solid-State Circuits Chapter |
| Contact
|
Dustin Dunwell, E-mail:
|
| Abstract
|
This presentation reviews the basics of clock and data recovery circuits
in high speed transceivers, with focus on top-down design strategy from
practical standpoint. Covered topics include selection of loop parameters,
limitations of the linear model, pull-in process and false lock, and effects
of circuit parameters on system performance. The second part of the presentation
is dedicated to the design and properties of hybrid oversampling CDR's, intended
to give an insight on the impact of architecture on the behavior of the CDR.
|
| Biography
|
Nikola Nedovic is a member of research staff at Fujitsu Laboratories of America,
Sunnyvale, CA. He received a Dipl.Ing. degree in electrical engineering from the
University of Belgrade, Yugoslavia, in 1998 and the Ph.D. degree from the
University of California at Davis, in 2003.
In 2001, he joined Fujitsu Laboratories of America, Inc., Sunnyvale, CA, where
he works in the area of high-speed communications and high-performance and low-power
VLSI circuits. Currently he is on his sabbatical at the University of Toronto working
on high-speed signaling circuits. His research interests include high-speed analog
and mixed-signal circuits for wireline communications, clock and data recovery, and
circuit design and clocking strategies for high-performance and low-power digital
applications.
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