Larry Devito
Analog Devices, Inc
Wilmington, MA
| Organizer: IEEE Solid-State Circuits Society |
| Title: Unusual Clock Recovery Architecture
Ameliorates Jitter Tradeoff |
| Speaker: Larry Devito Analog Devices, Inc Wilmington, MA |
| Abstract: A new architecture for clock recovery combines both a delay-locked loop and a phase-locked loop to decouple jitter tolerance and jitter transfer performance. Previous instantiation required a low gain crystal based vcxo, but this was way too expensive and too large to gain wide acceptance. An improved architecture will be discussed which obviates the vcxo, but necessitates a third loop for frequency-lock and a even a fourth loop for droop compensation. But transistors are small and cheap, so it all fits onto one chip, and that's what really matters! |
| Biography: Larry DeVito, SMEE, M.I.T., Cambridge MA, 1977. Larry has been at Analog Devices in Wilmington MA since 1980, where he is currently a Fellow. Over the decades he has worked in areas of instrumentation, data acquisition, transducer interface, and integrated sensor products. His current work is high-speed serial data communication components. Larry has eight patents and nine publications. He is a member of the ISSCC program committee since 2001, and was on the program committee of the VLSI Circuits Symposium from 1992 to 2001. He has been Research Affiliate at MIT, 1991-1994; and Special Services Appointed Professor at Boston University, 1992- 1994. |
| Time and Location: Friday October 4th, 2002 5:00 - 6:00 PM Room 1105, Sanford Fleming Building, 10 King's College Rd., University of Toronto Refreshments will be served. |
The Institute of Electrical and Electronics Engineers,
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