ADVANCED PROGRAMME
Workshop on VLSI Techniques & Manufacturing Technologies -- Brugge, Belgium
Monday, May 4, 1998

Workshop Opening and Welcome
Hardware integration in the 5th Programme
F. Ibañez, CEC, DG3
Technical Session I: Single Chip Package
I-1 A CSP Optoelectronic Package for Imaging and Light Detection Applications, A. Badihi, Shellcase
I-2 Ceramic CSP - The Characteristics and the Advantages, S. Tanahashi, S. Uegaki, S. Takeda, M. Fukui, Kyocera Corporation
I-3 Flip-Chip on BGA Ceramic: Design, Assembly, Reliability and Cost Analysis, J. López Contreras, E. Hernández, I. Villanueva, D. Peláez, N. de la Fuente, M. Cabeza, Dicryl SA
Technical Session II: (K)GD issues
II-1 Using Tape and Reel for High Volume Packaging of Bare Die, M. Noblet, 3M Company
II-2 Standards for KGD, A. S. Amirtham, Philips, D. Radley, Codus Ltd.
II-3 Miniaturized Electronic Products - Towards an Easy Access to High Density Packaging Solutions, C. Truzzi, J. Roggen, IMEC
Technical Session III: Materials & Processes
III-1 A Reliable, Low Cost Packaging and Assembly Process for Integrated Environmental Sensors, J. Barrett, A. Garde, B. Lane, F. Stam, NMRC
III-2 Cavity Fill Encapsulation of BGA Packages, A. Barbiarz, F. Huysmans, Asymtek
III-3 Linear Laminate: Packaging Solutions on Printed Circuit Board Level , F. Smeets, LinLam Products
III-4 Gold and Solder Bump Manufacturing Technologies for TAB, COG and Flip Chip Applications, M. Inagaki, S. Yokoyama, K. Naya, T. Wakabayashi, Casio Computer
III-5 Results of Ultra Fine Pitch Stencil Printing for Low Cost Flip Chip Bumping, K. Heinricht, E. Jung, L. Lauter, J. Kloeser, FhG/IZM-Berlin
Session IV: Packaging for Imagers & Opto-electronics
IV-1 3D Packaging for an Advanced High Resolution Microcamera, A. Coello-Vera, N. Venet, A. Aubain, Alcatel
IV-2 New Promising Technological Approach for Optoelectronic Hybridization, C. Massit, G. Nicolas, P. Mottier, G. Parat, G. Grand, CEA-LETI
IV-3 Hybrid Integrated Source for Wavelength Division Multiplexing, F. Borin, C. Coral, CPqD Telebras
H. Temkin, P. Morton, Lucent Technologies

Tuesday, May 5, 1998
Technical Session V: Integrated Passives
V-1 MCM-D Integrated Resistors Process and Characterization Results, J.P. Droguet, G. Teissier, Th. Marcel, Thomson CSF
V-2 Integrated Passive Components and Chip Scale Packaging, N. Pulsford, M. de Samber, M. van Delden, Philips Research Lab.
V-3 RF-Components Integrated in MCM-D
P. Pieters, S. Brebels, E. Beyne, IMEC
V-4 Integration of Inductors in MCM-L Technology, M. Duffy, T. ODonnell, S. OReilly, S. OMathuna, NMRC
Technical Session VI: Multi Chip Modules
VI-1 Low Cost MCM-LD Technology, S. Gong, K. Lennartsson, O.-J. Hagel, H. Hentzell, IMC, P. Ligander, T. Lewin, Ericsson Microwave Systems AB
VI-2 Advanced MCM L/D PBGA built using ORMOCER: New Photosensitive Dielectric Material, IMC Sweden
VI-3 A 32 Bit Microcontroller Multichip Module for High Environmental Applications, ZhG/IZM & TUBerlin
VI-4 Comparison of Two Pentium MCMs Implemented in MCM-D and COB Technology, ETH-Zurich
VI-5 A 16 Bit Microcontroller MCM-L for Automotive and Industrial Applications Compared with MCM-D Technology, FhG/IZM-Berlin
VI-6 Development of an MCM-C for Space Applications, Honeywell CTO
Technical Session VII: Characterization
VII-1 Electrical Characterization of IC Packages, NMRC
VII-2 Thermal Macro-Modeling of a Sukrface Mounted Package with a Computational Fluid Dynamic (CFD) Tool, Politecnico di Milano
VII-3 Thermal Cycling Reliability Analysis for Redistributed Flip Chip Assemblies, IMEC
Technical Session VIII: Reliability
VIII-1 Coated Optical Fiber Interconnect Subjected to the Ends O:ff-Sets and Axial Loading Design for Reliability, Lucent Technologies Inc.
VIII-2 Reliability Evaluations on a Chip Scale Package, Cypress Semiconductor Corporation
VIII-3 Solder Joint Reliability of Flip Chip on Board Structures, FhG/IZM-Berlin

For more information contact Mrs. Chantal Deboes at Fax: +32 16 28 15 01, e-mail deboes@imec.be.