First Call For Papers: 49th Electronic Components and Technology Conference
June 1 - 4, 1999 --- San Diego, California
The Sheraton Harbor Island Hotel
You are invited to submit papers that provide information on new developments and knowledge in the following areas:
Components: new passive or active component technologies, integrated / embedded components, component application, component performance and reliability.
Connectors: new or improved devices or techniques, emphasis on high density and performance for multichip and surface mount applications.
Education: education for engineering curricula in the 21st century and collaborative research and engineering programs between universities, government, or industry.
Interconnections: first level, cost effective interconnection technologies including TAB, wire, flip-chip and conductive polymers, bare chip attach to glass, FR4 and flex for temporary or permanent interconnects.
Manufacturing Technology: JIT, SPC, robotics, design for manufacturability, ISO cost identification and control, manufacturing processes, yield, test, manufacturing equipment.
Materials and Processing: adhesives, interconnection materials, ceramics, metals, composites, thermal materials
Modeling and Simulation: electrical, thermal, optical and mechanical modeling, simulation and characterization.
Multichip Packaging: design, fabrication, new technologies for high density / high speed applications, known good die (KDG), direct chip attach, MCM-C, MCM-D, MCM-L, 3-D, hybrid packaging - SMT, thick & thin film.
OptoElectronics: packaging for fiber-optic modules, infra-red wireless, consumer opto-electronics, flat-panel, projection and micro-displays, optical amplifiers, lasers, detectors, waveguide OEICs, and passive components, WDMs.
Poster: papers may be submitted on any of the listed major topics
Quality and Reliability: assessment failure analysis, reliability testing and data analysis, accelerated models, qualification of components and systems, KGD incremental quality improvement, TQM.
Single-Chip Packaging: new packaging technologies, designs, materials / configurations addressing performance, density and cost. Special emphasis on array, fine pitch, ultrathin and high lead count packaging, CSP, BGA enhanced SMT, DCA, COB.

You are invited to submit a 500-word abstract by fax or mail describing the scope, content , and key points of your proposed paper by October 15 to: Peter Slota, IBM Corp., D-GD7, 1701 North Street, Endicott, NY 13760. or Fax to 1 607 757 1126.