1998 International Integrated Reliability Workshop
October 12-15, 1998, Stanford Sierra Camp, Lake Tahoe California
Call for Papers
The Integrated Reliability Workshop will focus on ensuring semiconductor reliability through component design, characterization, and analysis tools. It provides a unique environment for envisioning, developing, and sharing reliability technology for present and future semiconductor applications.
One embodiment of these reliability tools is Wafer Level Reliability (WLR). WLR is most effective when a proven physical acceleration model is used in the design and application of reliability test structures, test methods, and stress conditions. This years’ IRW will focus on the effective use of WLR to build-in reliability. Some topics are:
Identification of Reliability Effects
Reliability Models
Reliability Test Structures
Wafer Level Reliability Tests and Test Approaches
Designing-in Reliability
Customer Product Reliability Requirements
Submission deadline: July 3, 1998. Please submit 15 copies of your 2 page presentation proposal (including figures).
Mail to: Eric S. Snyder, Sandia Technologies, 6003 Osuna Road NE, Albuquerque NM 87109 Fax 1 505 872 0022