Japan Chapter Report
The 4th VLSI Packaging Workshop of Japan what held November 30 - December 2 in Kyoto Japan. Approximately 80 engineers attended. This was considered a good turn-out because most companies are restricting travel until their profits return.
The 3rd IEEE IEMT/IMC Symposium and Microelectronics Show will be held April 21-23, 1999 in Omiya Sonic city near Tokyo Japan. The theme of the meeting will be "Microelectronics Packaging Innovation for the New Century". In addition to technical presentation sessions, there will be a microelectronics exhibition and a gathering place for experts to compare ideas.
The following fields will be covered:
** Advanced Subsystem Packaging Technology – MCMs, 3-D Packaging, Portables, Card Devices, Integrated Displays.
** Substrate Technologies – High Density PWBs, build-up layers, thick & thin film, metal base, and low cost.
** VLSI Packages – CSP, BGA, TCP
** Interconnection Technologies – Flip Chip, Anisotropic materials, TAB, wire bonding, solder, bumps, fine pitch.
** Materials and Components – Pb-free solder, integrated passives, encapsulants
** Optoelectronics Technologies – optical components, interconnections, measurements and sensing.
** Manufacturing – analysis, equipment, modeling, micro-machines.
** High Performance Design and Simulation – high frequency packaging, EMI/ EMC simulations.
** Thermal Management – thermal analysis and simulations, cooling systems and materials.
** Reliability and testing – Failure analysis, KGD, wafer level burn-in, rework and repair.
** Trends -- packaging, system, and marketing.
--extracted from Koji Nihei’s BOG report