The 3rd 1999 IEMT/IMC Symposium
April 21-23, 1999
Sonic City - Omiya, Tokyo, Japan
Symposium on "Microelectronics Packaging Innovation for the
New Century"
General Chair: Kuniaki Tanaka
For More Infomation: imaps@ruby.famille.ne.jp
Sample of presentations
WA1 Advanced Packages 1
Chairperson: J. Verdaman (TechSerch International, Inc.)
H. Tornimuro (NTT Electronics Corporation)
WAI-1 Development of Ceramic CSP-Array Format Carrier
and Assembly Technology, S. Uegaki, S. Matsuzono, S. Sato,
T. Kubota, S. Matsuda -- Kyocera Corporation
WAl-2 Development of Tape-stucked Wiring Boards
H. Tenmei, M. Ishino, M. Mita*--Hitachi Ltd., *Hitachi Cable Ltd.
WA1-3 Antenna-integrated Millimeter-Wave Module
N. Kakimoto, Sharp Corporation / Japan
WA14 Development of Mitsubishi Mold CSP Type II
K. Harada, T. Iwasaki, S. Yamada, M. Yasunaga,Y. Takemoto, Y.
Takata, T. Uebayashi, A Sawai,M. Hisahara, Y. Noguchi, K.
Imamura ,Mitsubishi Electric Corporation / Japan
WA1-5 2metal T-BGA for Higher Pin Count Utilizing New TAB
Process of Flip Chip Type, Y.Fukuzawa, Toshiba Corporation /
WAI-6 Electrical Characterization & Resonance Analysis of
Ball and
Pin Grid Array Packages for high frequency applications
M. lyer, Y. Qiu, K. Yaw, T. Tarter, G. Prasad
Institute of Microelectronics / Singapore
WB1 Underfill Materials
Chairperson: H. Fujioka (Mitsubishi Electric Corporation)
E. Takagi (Toshiba Corporation)
WB1-1 Best Dispensing Practices for Flip Chip Underfill
Manufacturing, A. Babiarz, ASYMTEK / U.S.A-
WBl-2 Encapsulants Microwave Curing for Electronic Packages
H. Quinones, A. Babiarz, ASYMTEK / U.S.A.
WB1-3 Study of the Underfill Material for Flip Chip Ball Grid
Array
(FC-BGA), K. Terashima, Citizen Watch Corporation / Japan
WB1-4 Evaluation of Underfills Fluxes and Solder Resists for Flip
Chip Applications by Single Lap Shear test
A. Tuominen, K. Yamamori*, T. Mugishima*
Tampere University of Technology / Finland,
*Furukawa Electric Co., Ltd. / Japan
WB1-5 Flow Characteristics of Underfill Materials for Flip-Chips
H. Hozoji, S. Tsunoda, J. Saeki -- Hitachi, Ltd. / Japan
WB 1-6 High Reliability Underfill for Flip Chip on Board Applications
FA1 Interconnection Technologies I
Chairperson: E. Takagi (Toshiba Corporation)
I. Watanabe (Hitachi Chemical Co., Ltd.)
FAI-I Problems and Approaches to Microbonding with Ni/Au Plate,
Y. Obar-, Super Solder Technologies Inc. / Japan
FAl-2 Reliability of ElAtectic SnPb-bumped Flip Chip components
on FR5
Board, J. Maattanen, P. Palm, A. Tuominen*, Elcoteq Network
Corporation, *Tampere University ofTechnology / Finland
FAI-3 Exceeding the Tg of the underfill material in FCOB circuits-the
impact on solder bump lifetime under thermal cycling, J. Liu,
J.
Nysaether* IVF - The Swedish Institute of Production Engineering
Research / Sweden, *University of Oslo / Norway
FAI-4 Flip Chip Bonding Technology employing Photosensitive Adhesive
Resins,1'. Funaya, K. Matsui, NEC Corporation / Japan
FAl-5 The Wafer Scale Package for DRAM and Other Applications:
UltraCSP, T. Goodman, S. Barrett, Flip Chip Technologies / U.S.A~
FAI-6 Reduced Mask Level Interconnection Process
G. Vishwanadam, C. Wong, S. Sathappan, Institute of
Microelectronics / Singapore
1FB1 Reliability and Testing Methodology I
Chairperson: H. Oppermann (FhG-IZM) H. Shigi (Hitachi, Ltd.)
FBI-I Segregation of Tin Lead Structures in Old Solder in Sern
Analysis
vs. Temperature Cycling, K. Maattanen, J. Happonen*, .Fuominen**
Nokia Display Products, *Nokia Mobile Phones, **Tampere
University of Technology / Finland
FBI-2 Verification of a Governing Parameter for Electromigration
Damage
in Metal Lines, K. Sasagawa, N. Nakamura, M. Saka, H. Abe,
Tohoku University /Japan
FBI-3 Board Level Reliability of CSP' s Investigated with the
Micro DAC
Method, J. Simon, 1). Vogel, B. Michel
Franhofer Institute Reliability and Microintegration / Germany
FBI-4 ATEM Observation for Solder Joints of the Electronic Device
H. Matsuki, H. lbuka*, K. Saka*, Y. Araki**, T. Kawahara
Fujitsu Limited, *Nagoya University, **Fujitsu Media device
Limited / Japan
FB1-5 Wavelet Analysis of Discharge Current in Surface Dielectric
Breakdown of Contaminated Printed Wiring Board under DC
Magnetic Field,B. Du, S. Kobayashi, Niigata College of Technology
FBI-6 Detection of Early Ionic Migration by C and Tan a between
Conductors on Printed Circuit Board at Low Frequency, Y. Yamano,
T. Tsukui* Chiba University, *Toukai University / Japan
FA2 Reliability and Testing Methodology II
Chairperson: K. Hayashi (TDK Corporation)
K. Tsukamoto (Matsushita Electric Industrial Co., Ltd.)
FA24 Novel Anisotropic Conductive Film for Base Die Testing
F. Eriguchi, M, Yamaguchi, F. Asai, Y. Hotta
Nitto Denko Corporation /Japan
FA2-2 Thermal Deformation Analysis of Printed Circuit Connector
Due to
Current Flow by Using Holography, M.Taniguchi, T. Takagi*
Meijo University, *Nihon University / Japan
FA2-3 Development of Burn-in Test Socket far 0.5min Pitch LGA
M. Sakata, Furukawa Electric Co., lAd. /Japan
FA2-4 Gate-Level Current Simulation Using Event-Driven Technique
J. Wang, National Center for High-Performance Computing / Taiwan
FA3 Interconnection Technologies 11
Chairperson: J. Liu (IVF-The Swedish Institute of Production
Engineering Ressarch)
1. Watanabe (Hitachi Chemical Co., Ltd.)
FA3-1 The Development of the IC Bonding Technique Using M Bump
Y. Yagi, Matsushita Electronic Components Co., Ltd. / Japan
FA3-2 Shape Evolution of Electrodeposited Bumps with Additive
and its
Application, K. Kondo, T. Monden, M. Fguchi, Z. Tanaka,
University of Okayama / Japan
FA3-3 Reliability Investigations of Hard Core Solder Bumps using
Mechanical Palladium Bumps and SnPB Solder, H. Oppermann, C.
Kallmayer, R. Kdlicki, M. Klein, R. Aschenbrenner, H. Reichi,
Fhz-IZM / Germany
FA34 Development of High Volume Solder Bump Formation Method
N. Oroku, Hitachi. Ltd. / Japan
FA3-5 Solder Bump Forming using Ball Mounting Technology
M.Tago, Y. Ueoka, Y. Kato, E. Kono, K. Furuya, S. Morishige
NEC Corporation / Japan
FB2 Trends
Chairperson: Y. Kunimatsu (Kyocera Corporation) K. Yamamura (Sharp
Corporation)
FB2-1 Competitive Assessment of Chip Scale Packages
C. Bauer, TechLead Corporation / U.S.A.
FB2-2 Selection of Interconnection Technology in MCM Project
L. Pykari, A. Tuominen*, E. Ristolainen*
Nokia Mobile Phones, *Tampere University ofTechnology Finland
FB2-3 Factors Influencing on the Design of Portable Computers
S. Denda, Shinsyu University /Japan
FB2-4 Market Trend for High Pin Count Packaging
J. Vardaman, TechSarch International, Inc. / U.S.A.
FB3 ACF/ACP
Chairperson: T. Takei (Oki Electric Industry Co., Ltd.) H. Shigi
(Hitachi, Ltd.)
FB3-1 Development of Novel Anisotropic Conductive Film (ACE)
M. Yamaguchi, F. Asai, F. Eriguchi, Y. Hotta, Nitto Denko
N. Corporation / Japan
FB3-2 Development of Flip Chip Attach Technology Using An Ball
Bumps
and Anisotropic Conductive Paste, T. Motomura, H. Hirai, 0.
Shimada, Y. Fukuoka Toshiba Corporation /Japan
FB3-3 A Small Multi Chip Camera Module Utilizing ACP Interconnection
Method, J. Karasawa, Toshiba Corporation / Japan
FB3-4 Enhancement of connection reliability of ACE joints in flip-chip
interconnection onto organic substrates, A. Nagai, K. Takentura.
Watanabe, Hitachi Chemical Co., lAd. /Japan
FB3-5 Novel Anisotropically Conductive Film for Flip Chip Attach
M. Holloway, Loctite RD&E / Ireland