Summary of the 49th Electronic
Components and Technology Conference (ECTC)
The 49th ECTC was held June 1-4, 1999, at the Sheraton San
Diego Hotel and Marina, San Diego, California. There were approximately
900 people in attendance. The conference offered attendees 10
short courses, 32 technical sessions (including 2 poster sessions,)
a plenary session on emerging technologies, a technology corner
with approximately 60 exhibitors and 3 luncheons with invited
speakers. Technical diversity is ECTC's hallmark and one can
visit their web site to see the scope of their technical offerings
Some of the technical highlights of the 49th ECTC follow:
There were 6 sessions on optoelectronics. In one, the creative
development of new small form factor fiber-optic connectors now
entering the market was highlighted. These connectors have been
developed to meet the market needs for twice the optical fiber
density for duplex fiber connectors, each in different ways.
Flip chip packaging and materials continue to be of strong
attendee interest at ECTC. Intel presented their flip chip on
organic packaging work, which has been successfully implemented
in manufacturing. More than 15 million units have been produced
in the first year. The OLGA product attributes were provided
for this build-up package with BT epoxy resin core and photo-defined
blind/buried vias. Also, reliability testing requirements and
process flows were provided.
AMD presented a paper with NTK Technical Ceramics discussing
a novel solder column interposer which isolates stress due to
TCE mismatch between the PWB and the chip package. New power-down
requirements for PCs drive increased on/off cycles and result
in more stress on the interconnections. The solder column interposer
offers a solution for management of the reliability. Assembly
processes have been developed and are suitable for volume manufacturing.
3M presented the Laminated MicroInterconnect (LMI) which is
a parallel build micro via substrate with applications including
flip chip packaging for one or several die. Very thin substrates
(8 layers less than 300 microns thick) can be used as a stand
alone, flexible substrate or laminated to a rigid polymer or ceramic
substrate to provide testable, high density surface routing.
LMI uses via stacking rather than through vias.
In connectors, Micron Technology presented a silicon contact
technology for flip chip and CSP probing, testing and burn-in.
The basic silicon contact consists of square micromechanical
pockets that are etched into a silicon substrate. Multilayer
metal structures can be made to handle higher I/O die. Methods
of fabricating this technology are not constrained by scaleability
issues versus other mechanical contacting technologies.
Micron Semiconductor Asia Pte Ltd showed the development and
qualification of palladium Cu leadframes for DRAM LOC packages.
Analysis and solutions for solderability (after long burn-in
times) package warpage control and temperature cycling reliability
were included. The authors concluded that with the right die
size to package size ratio, Pd Cu leadframes can be implemented
in DRAM LOC packages.
Two complementary papers by Georgia Institute of Technology
and the National Starch and Chemical Company highlighted recent
advances moving electrically conductive adhesives forward toward
the goal of providing a practical replacement for solder interconnections.
The Isotropic Conductive Adhesive (ICA) is one form of ECAs made
up of a random dispersion of silver flakes in an epoxy matrix.
The Georgia Tech paper identifies the mechanism of oxide formation
on contact pads as galvanic corrosion. The National Starch paper
showed the poor impact performance of traditional ICA materials
was due to low energy dissipation, and can be solved by using
epoxy materials with low glass transition temperatures. This
work takes on more importance as discussions of Pb solder replacement
In the area of manufacturing and component reliability, Lucent
Technologies presented a paper on handling highly-moisture sensitive
components in a manufacturing assembly environment. Moisture
diffusion analyses coupled with experimental verification studies
show that time in storage is as important a variable as floor-life
exposure. These studies are affecting changes in the JEDEC/IPC
moisture sensitivity classification and testing methods.
Finally, a plenary session hosted by Prof. Rao Tummala was
held on emerging technologies. Three strategic technologies consistent
with industry needs in the 21st century were introduced in this
forum. They included Dr. Karl Johnson, Motorola, "Future
directions of RF and wireless technologies," Dr. Phil Garrou,
Dow Chemical, "Status and prospects of wafer level chip scale
packaging," Dr. Karen Markus, MCNC, "MEMS packaging:
markets and technology challenges." The successful plenary
session format for emerging technologies will be repeated at the
50th ECTC in Las Vegas.
For information concerning presenting a paper, exhibiting,
or attending the 50th ECTC to be held at Caesars Palace, Las Vegas,
NV, May 21-24, 2000, check the ECTC web site at www.ectc.net,
or send your name and address to:
-- Judy Adams, EIA/ECA, Jadams@eia.org, Fax: 703-907-7549