Advanced Packaging Materials Processes, Properties and Interfaces
March 6-8, 2000
Chateau Elan
Braselton, Georgia
General Chair:
C.P. Wong
Georgia Institute of Technology
Technical Chairs:
Philip Garrou, Dow Chemical Company
James E. Morris, SUNY Binghamton
Technical Program
Session 1: Adhesives
Co-Chairs: Quinn Tong, National Starch and Chemical Company; Johan
Liu, IVF
Session 2: Integrated Passives
Co-Chairs: James Young, Intarsia Corporation, Timothy G. Lenihan,
Sheldahl, Inc.
Session 3: Underfill
Co-Chairs: Daniel Baldwin, Georgia Institute of Technology; Ray
Pearson, Lehigh University
Session 4: Encapsulation
Co-Chairs: Ken Gilleo, Alpha Metals/Cookson; S.H. Shi, Georgia
Institute of Technology
Session 5: Flip Chip Bumping
Co-Chairs: Phil Deane, MCNC; Rolf Aschenbrenner, Fraunhofer Institute
Session 6: Solder
Co-Chairs: Andrew Strandjord, IC Interconnect; Rajen Chanchani,
Sandia National Laboratory
Session 7: Flip Chip
Co-Chairs: Jianmin Qu, Georgia Institute of Technology; Li Li,
Motorola
Poster Session
Chair: C.P. Wong, Georgia Institute of Technology
Session 8: Chip Scale Packages
Co-Chairs: Michael J. Toepper, TUB/Fraunhofer IZM; Peter Elenius,
Flip Chip Technologies
Session 9: High Density Substrates
Co-Chairs: Petri Savolainen, Nokia-Japan Co., Ltd.; Andreas Schubert,
Fraunhofer Institute
Session 10: Thermomechanics
Co-Chair: Suresh Sitaraman, Georgia Institute of Technology
Professional Development Courses - Sunday, March 5
Polymers for Electronic Packaging:
Materials, Processes and Reliability (1/2 Day)
1:30 pm - 5 pm
Professor C.P. Wong
School of Materials Science and Engineering
Packaging Research Center
Georgia Institute of Technology
Objectives of the Course
Polymers are widely used in electronic packaging as adhesives, encapsulants, insulators, dielectrics, molding compounds and conducting elements for interconnects. These materials also play a critical role in the recent advances of low-cost, high performance reliability without hermeticity (RWOH), multichip module (MCM), Chip-On-Board (COB), Ball Grid Array (BGA) and Chip Scale Packaging (CSP). It is imperative that materials suppliers and users have a thorough understanding of polymeric materials and their importance in the advances of the electronic packaging and interconnect technologies.
Who Should Attend this Course?
The course is designed for engineers and scientists who are involved with the design, process and manufacturing of IC electronic components and hybrid MCM packaging; for electronic material suppliers who are actively engaging in materials R&D, and managers who want to keep abreast of the latest developments in polymeric materials in electronic packaging.
Introduction to Electrically Conductive Adhesives (1/2 Day)
1:30 pm - 5 pm
James E. Morris, Ph.D.
Department of Electrical Engineering
T. J. Watson School of Engineering & Applied Science
State University of New York at Binghamton
Objectives of the Course
The course covers the primary concepts of both isotropic (ICA)
and anisotropic (ACA) forms of electrically conductive adhesives
(ECAs,) but with a focus on the ICA. The treatment of ACA materials
includes both paste and anisotropic (z-axis) conductive film (ACF)
forms. The primary goal of the course is to develop the structure-property
relationships of each of the materials, with a sound understanding
of how ICA structure, for example, determines its electrical properties.
Design criteria are covered as part of this development, which
leads to the interpretation of reliability data in terms of failure
modes. In all cases, research data from the literature is used
to illustrate the issues discussed.
Technical Program
Monday, March 6
Registration: 7 am - 12:30 pm
Session 1:
Adhesives
8am 10:05am
Session Chair:
Quinn Tong, National Starch and Chemical Company
Johan Liu, IVF
NCF & NCP New Assembly Solutions for High
Volume Manufacturing of PFC, Flip Chip Devices
Richard H. Estes, Polymer Flip Chip Corporation
Development of a Novel Electrically Conductive Adhesives
Daoqiang Lu, C.P. Wong, Georgia Institute of Technology
Advancing Materials using Interfacial Process and Reliability
Simulations on the Molecular Level
N. E. Iwamoto, Johnson Matthey Electronics
Novel Conductive Adhesives with Stable Conductivity and High
Impact Resistance
Quinn K. Tong, Eric Zhang, National Starch and Chemical Company;
Gerry Frederickson, Rose Schultz, Emerson and Cuming Specialty
Polymers
Novel Conductive Adhesives for Solder Replacement in Electronic
Packaging
Daoqiang Lu, C.P. Wong, Georgia Institute of Technology
Break: 10:05 am - 10:25 am
Session 2:
Integrated Passives
10:25am - 12:30pm
Session Chairs:
James Young, Intarsia Corporation
Timothy Lenihan, Sheldahl, Inc.
Fundamental Design Boundaries for the Dielectric Thin-Films
Eugene J. Rymaszewski, Jin Young Kim, Toh-Ming Lu, RPI
Novel High Dielectric Constant Polymer-ceramic Composite for
Embedded Capacitor Application
Yang Rao, S. Ogitani, C.P. Wong, Georgia Institute of Technology
Materials Options for Dielectrics in Integrated Capacitors
Richrd Ulrich, Len Schaper, University of Arkansas, HiDEC
Reliability Results for Polymeric Materials used in Passivation
of Integrated Passive Devices
Brian Arbuckle, Don Bolton, Sunil Wijeyesekera, James Young, Intarsia
Corporation
Self-consistent Model for Dielectric Constant Prediction of
Polymer-ceramic Composite
Yang Rao, Jianmin Qu, C.P. Wong, Georgia Institute of Technology;
Tom Marinis, Draper Laboratory
Lunch: 12:30 pm - 1:30 pm
Session 3:
Underfill
1:30pm 3:35pm
Session Chairs:
Daniel Baldwin, Georgia Institute of Technology
Ray Pearson, Lehigh University
Experimental and Numerical Reliability Investigations of FCOB
Assemblies with Process-Induced Defects
A. Schubert, R. Dudek, J. Kloeser, B. Michel, H. Reichl, Fraunhofer
Institute for Reliability and Microintegration IZM
An Evaluation of Two Underfill Materials used in a Flip Chip
CSP
R. Berriche, Intersil Corporation
Characterization of the Properties of the Bisphenol A and Bisphenol
F Epoxies Cured by Imidazole Derivatized Curing Agents for Flip-Chip
Underfill Applications
S.H. Shi, T. Yamashita and C.P. Wong, Georgia Institute of Technology
Material Challenges for Wafer-Level Underfills
Bodan Ma, Eric Zhang, Sun Hee Hong, Quinn K. Tong, Anna Savoca,
National Starch and Chemical Company
Adhesion Characterization of No Flow Underfill Baselined with
Fast Flow Snap Cure
Jicun Lu, Brian Smith, Daniel F. Baldwin, Georgia Institute of
Technology
Break: 3:35 pm - 3:55 pm
Session 4:
Encapsulation
3:55pm 6 pm
Session Chairs:
Ken Gilleo, Alpha Metals/Cookson
S.H. Shi, Georgia Institute of Technology
Adhesion Studies of Polyimide Epoxy Interfaces in Flip
Chip Assemblies
Raymond A. Pearson, Thomas B. Lloyd, Lehigh University
Optimization of the Dispensing Process for Reflowable Encapsulants
in Flip Chip Assembly
P. Chouta, S. Davey, D.L. Santos, Binghamton University
A Novel Epoxy Encapsulant for CSP (µBGA®) - New Hydrophobic
Epoxy Elastomer
Frank Y. Xu, Ph.D., Richard Bymark, 3M Company; Bin-Lin Hsu, Ph.D.,
Tessera, Inc.
Evaluation of Environmental Protection of Photo BCB Polymers
(Cyclotene 40XX)
Jaili Wu, CP Wong, Georgia Institute of Technology; Dan Scheck,
Phil Garrou, The Dow Chemical Co.
Novel Single Pass Reflow Encapsulant for Flip Chip Application
Hui Wang, Torey Tomaso, Xin Lin and Jennifer Allen, Kester Solder
- Litton
Exhibits Open
3 pm - 8 pm
Welcome Reception in Exhibit Hall
6:30 pm - 8 pm
Tuesday, March 7
Session 5:
Flip Chip Bumping
8am 10:05am
Session Chairs:
Kenneth Williams, MCNC
Rolf Aschenbrenner, Fraunhofer Institute
Qualification of the System Electroless Nickel Bumps and PbSn5
for High Temperature Applications
Sabine Anhóck, Andreas Ostmann, Technical University of
Berlin; Rolf Aschenbrenner, Herbert Reichl, Fraunhofer Institute
for Reliability and Microintegration
Break Through Developments on Electroless Nickel/Gold Plating
on Copper Based Semiconductors
Andrew J.G. Strandjord, Scott F. Popelar, Curt A. Erickson, IC
Interconnect
Numerical Investigation on the Influence of Different Substrate
Materials on the Viscoplastic Behaviour of Flip Chip Solder Bumps
A. Eberle, R. Sievert and W. A. Schiller, Federal Institute for
Materials Research and Testing (BAM), Berlin, Germany
Issues with Fine Pitch Bumping and Assembly
Sundeep Nangalia, Salvatore Bonafede, Alan Huffman, Chad Statler
and Philip Deane, MCNC
Alternate Solder Bump Technologies for Flip Chip Applications
Li Li, Motorola Inc.
Break: 10:05 am - 10:25 am
Session 6:
Solder
10:25am 12:30pm
Session Chairs:
Andrew Strandjord, IC Interconnect
Rajen Chanchani, Sandia National Laboratory
Formation of the Ni3Sn4 at the Boundary between Sn-Pb Solders
and Au/Ni Plating
Akira Maeda, Toshio Umemura, Qiang Wu, Yoshihiro Tomita, Mitsubishi
Electric Co.; Takeshi Abe, Fukuryo Semiconductor Engineering Co.
Formation, distribution and failure effects of voids in vapor-phase
soldered small solder volumes
M. Beschorner, J. Villain, University of Applied Sciences Augsburg;
H. J. Hacke, B. Brabetz, J. Zapf, Siemens AG
Characterization of Mechanical Properties of Bulk Lead Free
Solders
Li Xiao, Johan Liu, Chalmers University of Technology
Effect of Thermal Aging on the Shear Strength of Lead-Free
Solders
James Oliver, Zonghe Lai, Chalmers University of Technology/IVF;
Johan Liu, Chalmers Univeristy of Technology
Flip Chip Self-alignment Mechanism and Modeling
Ruijun Chen, Brett Fennell, Daniel F. Baldwin, Georgia Institute
of Technology
Lunch in the Exhibit Hall
12:30 pm - 1:30 pm
Exhibit Open
9:30 am - 7 pm
Posters in Exhibit Hall
3 pm - 7 pm
Session 7:
Flip Chip
1:30am 3:35pm
Session Chairs:
Jianmin Qu, Georgia Institute of Technology
Li Li, Motorola
Reworkable No-Flow Underfills for Flip Chip Applications
Lejun Wang, Haiying Li, C.P. Wong, Georgia Institute of Technology
Flip Chip on Board (FCOB): Solderability, Reliability and the
Role of Surface Finish
Weiping Li, Harold Fields and Richard Parker, Delphi-Delco Electronics
Systems
Wafer Scale Packaging Based on Underfill Applied at the Wafer
Level for Low-Cost Flip Chip Processing
C. Dustin Johnson, Stephen Busch, Daniel F. Baldwin, Ph.D., Georgia
Institute of Technology
Effects of No-Clean Flux Residue on the Performance of Flip-Chip
Devices
Michael Todd, Dexter Electronic Materials
Effect of Coupling Agents on Underfill Material in Flip Chip
Packaging
Shijian Luo, C.P. Wong, Georgia Institute of Technology
Break: 3:35 pm - 3:55 pm
Session 8:
Chip Scale Packages
3:55pm - 6pm
Session Chairs:
Michael Toepper, TUB/Fraunhofer IZM
Peter Elenius, Flip Chip Technologies
Wafer Level Package using Double Solder Balls
Michael Toepper, TUB/Fraunhofer IZM
Mechanism of Underfill Cracking in Flip Chip BGA Package
J.B. Shim, E.C. Ahn, T.J. Cho, H.J. Moon, T.G. Chung, H.K. Yun,
S.Y. Kang, S.Y. Oh, Samsung Electronics Co., Ltd.
3D Wafer Level Packaging
Sergey Savastiouk, Oleg Siniaguine, Ed Korczynski, Tru-Si Technologies
A Parametric Study of the Effects of Process Parameters on
the Assembly of Chip Scale Packages
T. A. Nguty, B. Salam, and N. N. Ekere, University of Salford
Ultra CSP - Bump on Polymer Structure
H. Yang, Flip Chip Technologies
Poster Papers
3pm - 7pm
Session Chair:
C.P. Wong, Georgia Institute of Technology
Reworkable Underfills for Flip Chip, BGA, and CSP Applications
Lejun Wang, Ray Kang, Kaiying Li, Dan Baldwin, C.P. Wong, Georgia
Institute of Technology
Study on the Correlation of Flip-Chip Reliability with Mechanical
Properties of No-Flow Underfill Materials
S.H. Shi, Q.Z. Yao, J.M. Qu, C.P. Wong, Georgia Institute of Technology
Development of No-Flow Underfill Materials for High Lead Solder
Bumped Flip-Chip Applications
S.H. Shi, Z.Q. Zhang, C.P. Wong, Georgia Institute of Technology
Development of New Reworkable Epoxy Resins for Flip Chip Underfill
Applications
Haiying Li, Lejun Wang, C.P. Wong, Georgia Institute of Technology
Spray-Formed Silicon-Aluminum: A New Light-Weight Electronic
Packaging Solution
David M. Jacobson, Electronic Materials Consultant; Andrew J.W.
Ogilvy, Osprey Metals Ltd.
Development of Novel Composite Bonding Wires for Harsh Environments
Ulrich Draugelates, ISAF Technical University of Clausthal; Jurgen
Wilde, University of Freiburg
Incorporation of Inorganic Filler into the No-Flow Underfill
Material for Flip-Chip Application
Lianhua Fan and CP Wong, Georgia Institute of Technology
Effects of Curing Agents on the Properties of Electrically
Conductive Adhesives
Daoqiang Lu, C.P. Wong, Georgia Institute of Technology
Wafer Level Batch Packaging Incorporation of Porous Gaps in
a Polyimide Matrix using a Low Modulus Sacrificial Commercial
Polymer
J. Williamson, C.P. Wong, Georgia Tech
Surface Tension Study of Substrates in Electronic Packaging
Shijian Luo, Mike Vidal, C.P. Wong, Georgia Institute of Technology
Low Temperature and Low Stress Reworkable Adhesives for MCM
Jiali Wu, C.P. Wong, Georgia Institute of Technology
Electrical Characterizations and Considerations of Electrical
Conductive Adhesives (ECAs)
Y. Shimada, Hitachi Research Lab; D. Lu, C.P. Wong, Georgia Institute
of Technology
Investigation on Effect of Carbon Black and Polymer Matrix
on Conductive Polymer Composites with Positive Temperature Coefficient
Shijian Luo, C.P. Wong, Georgia Institute of Technology
Wednesday, March 8
Session 9:
High Density Substrates
8am - 10:05 am
Session Chairs:
Petri Savolainen, Nokia-Japan Co., Ltd.
Andreas Schubert, Fraunhofer Institute
High Density Substrate for Semiconductor Packages using Newly
Developed Low CTE Build-up Material
Atsushi Takahashi, Hitachi Chemical Co., Ltd.
Halogen-free Materials for PWB and Advanced Package Substrate
Ken Ikeda, Hitachi Chemical Co., America, Ltd.
Next Generation ALIVH® Substrate for Bare LSI Chip Direct
Mounting
Daizo Andoh, Tousaku Nishiyama, Tadashi Nakamura, Kazuo Eda, Masahide
Tsukamoto, Matsushita Electric Industrial Co., Ltd.
Comparison of various Micro Via Technology
Toshio Nishiwaki, Ibiden Co., Ltd.
Development of Super Fine Pattern PWB MOSAIC
Nobuo Komatsu, Kazuhiro Shimizu, Sony Neagari Corp; Soichiro Kishimoto,
Hiroyuki Hishinuma, Sony Chemicals Corp.
Break: 10:05 am - 10:25 am
Session 10:
Thermomechanics
10:25am 12:30pm
Session Chair:
Suresh Sitaraman, Georgia Institute of Technology
Hygroscopic Behavior and In-Line Thermo-Mechanical Treatment
of Polymeric Material on PBGA Warpage
Jim C.L. Wu, Morris Liang, Alex Lee, G.Y. Hung, J.J. Lee, Advanced
Semiconductor Engineering, Inc.
Interface Design and Thermal Stresses in Layered Microelectronic
Assemblies
Thomas Siegmund, Purdue University
Cure Kinetics Modeling of ViaLux 81: A Novel Epoxy Photo-Dielectric
Dry Film (PDDF) for Microvia Applications
Rajiv C. Dunne, Suresh K. Sitaraman, Shijian Luo, C.P. Wong, Georgia
Tech; William E. Estes, Mookan Periyasamy, DuPont Photopolymers
and Electronic Materials
BGA and C4 Fatigue Dependence on Thermal Cycle Frequency
Giulio Di Giacomo & Umar Ahmad, IBM Microelectronics
Application of Phase-Change Materials in Pentium® II and
Pentium® II Xeon Processor Cartridges
Chia-Pin Chiu, Gary L. Solbrekken, Vassou LeBonheur and Youzhi
Xu, Intel Corporation