Announcement
INTERNATIONAL WORKSHOP ON
INTEGRATED POWER PACKAGING (IWIPP)
REGISTER AT: www.ieee.org/conferences/IWIPP
Participate, Vacation and Learn
Westin Hotel, Waltham, MA USAJuly 14 – 15, 2000
(Friday and Saturday)
The Workshop provides a forum for technical communications focused
on the needs and interests of the power electronics components
and systems engineers. Presentations will cover the design, analysis,
fabrication, testing and application of advanced components and
systems packaging technologies.
Friday Morning Short Course:
"Power Packaging – A Systems Perspective"
by Dr. D. C. Hopkins and Dr. K. Shenai.
This course provides the latest design methodology for electrical/physical
designers; introduces important electrical, mechanical and thermal
attributes of the latest materials, components and interconnect
technologies; and will help design engineers optimize a converter/inverter
design by showing complete commonality in design issues regardless
of power or package level. Friday Afternoon Plenary Session:
The Plenary Session cross cuts the latest advances in power electronics packaging including a report on the status of packaging as recently compiled by the Power Sources Manufactures Association (PSMA). The presentations are in longer format for more audience participation
Friday Evening Banquet Speaker:
Mr. Terry Ericsen, Office of Navel Research
Friday Evening Rap Session:
"What is the real status of the packaging technologies"
Saturday Morning Session:
The selected papers will cover:
Present practices of converter packaging
Novel 3-D packaging approaches, embedded multilayer structures
and examples
Study of Power module structures and Tools for thermal simulation
RF De-Embedding techniques for extracting power MOSFET package
parasitics, and
EMC bench testing of supplies.
Saturday Afternoon Session:
The selected papers will cover:
MCM-D packages for for power applications
Comparison of wire bonding, solder-bumping, and solder joint reliability
Package effects in avalanche ratings of power MOSFETs
Electromagnetic Limits of planar integrated magnetic structures
Fabrication of V-grove inductors using composite magnetic materials.
Saturday Luncheon Speaker: State of the Industry
Saturday Spouse Program:
Tour beautiful Boston with a tour guide and lunch included.
Visit www.BostonUSA.com
IWIPP is sponsored by the IEEE-CPMT, -PELS, and -EDS Societies,
IMAPS, the PSMA, the Energy Systems Institute - UB, HiDEC-Univ
of AK, Center for Power Electronic Systems – NSF ERC and
IEEE Boston Section CPMT Chapter.
The Workshop General Chairman is Douglas C. Hopkins, UB (D.Hopkins@IEEE.Org).
The Technical Program Chairmen are Guo-Quan Lu, VPI&SU (gqlu@vt.edu)
and Prabjit J. Singh, IBM (pjsingh@us.ibm.com).
Register by June 7 at: www.ieee.org/conferences/IWIPP
or contact: Bob Alongi
Sec.Boston@IEEE.Org
Boston Section IEEE
240 Bear Hill Road #202B
Waltham, MA 02451-1017