C A L L F O R P A P E R S
2001 International Symposium on
Quality Electronic Design

March 26-28, 2001 , San Jose, California, USA
www.isqed.org

The International Symposium on Quality Electronic Design (ISQED) provides a forum to present and exchange ideas and to promote the research, development, and application of design techniques & methods, design processes, EDA design tools, and flows. The conference attendees are primarily designers of the VLSI Integrated Circuits & Systems (IP & SoC), and those involved in the Research, Development and Application of EDA/CAD Tools and Design flows, Process/Device Technologists, and Manufacturing Specialists. ISQED emphasizes a holistic approach toward design quality and intends to highlight and accelerate co-operation among the IC Design, EDA, and Semiconductor Technology communities.

PAPERS, TUTORIALS, PANELS ARE SOLICITED ON:
Packaging Analysis & Simulation
Closing the Design to Manufacturing Loop (Design for Manufacturability)
Emerging Processes & Devices, and the Impact on Reliability, Yield, and Performance of the VLSI Design
Design and Abstraction/Modeling Methods for IP Blocks & Libraries
Design Methodologies; Custom, Semi-Custom, ASIC, FPGA, etc, focused on Quality
Quality of Modeling Abstractions and Methods (Device, Interconnect, Micro and Macro Cells)
Physical Synthesis Tools and Quality Implication
Management of Design Process, and Design Database
EDA Tools Interoperability Implications
Networking Circuit Design; Flows, Methods, and QoS
Design Quality Definitions, Metrics, and Standards
Global, Social, and Economic Implications of Design Quality
Design for Testability, and Quality of Test Coverage
Low Power Test
Low Power Designs with focus on design quality
Fault Tolerant & Redundancy Design Techniques
EDA Tools, Design Techniques, and Methodologies, dealing with issues such as:
Timing Closure
R, L, C Extraction
Signal Reflection
Ground/Vdd Bounce
Signal Noise/Cross-Talk
Substrate Noise
Voltage Drop
Metal Migration
High Frequency Effects
Thermal Effects
Power Estimation
Hot Carriers
Plasma Induced Damage
EMI/EMC
Proximity Correction & Phase Shift Methods
Verification (Layout, Circuit, Function, etc.)
EOS/ESD
Packaging

Submission Process
Electronic submission via e-mail is the only accepted submission mode. The guidelines for paper format are available on the conference web site at http://www.isqed.org. Please email all your inquiries to isqed@isqed.org.