ECTC PROGRAM OUTLINE

The 51st Electronic Components and Technology Conference (ECTC) will be held at the Wyndham Palace Resort and Spa, in Lake Buena Vista (Orlando), Florida from 29 May - 1 June 2001.
This international conference brings together the best in packaging, components, and microelectronic systems science, technology, and education in an environment of cooperation and technical exchange.
The 51st ECTC will have almost 300 papers, organized into 38 technical sessions, focusing on leading edge developments and technical innovations in several areas, including: optoelectronics, system on a package technologies, RF and MEMS packaging, high performance package design, simulation and manufacturing, flip chip and Pb-free interconnections, wafer-level and chip scale packaging, and reliability test methods and design.
Two technical sessions will specifically explore topics related to engineering education and academic/industry/government collaborative research and engineering programs for the 21st century.

Two Poster Sessions will offer a unique opportunity for authors and ECTC attendees to interact, discuss in detail, and exchange ideas in a more relaxed forum. To emphasize the importance of this method of technical presentation, the ECTC will be recognizing and giving an award for the best and outstanding posters.
The 51st ECTC will feature a Panel Session on Wireless Technologies organized by Dr. Ephraim Suhir. This session, offered on the Tuesday evening (29 May 2001), has a format that allows for ample exchange and dialogue between the presenters and audience.

A Plenary Session featuring presentations on leadership technologies, organized by Dr. Phil Garrou, is a feature for Wednesday evening (30 May 2001). This session will provide the conference participants the opportunity to gain the insight and perspective of technical and business leaders.
This conference also offers 14 Short Courses. Dr. Al Puttlitz and the short course committee have brought together industry experts from a wide variety of disciplines to offer state-of-the-art technology reviews and updates in condensed half-day and full-day formats. Topics to be covered include: RF/wireless packaging, optoelectronic packaging, optical networks, chip scale and wafer scale packaging, Pb elimination in electronic assemblies, and polymers for electronic packaging. These courses are eligible for Continuing Education Unit (CEU) credits.
Each ECTC attendee will receive a choice of the Proceedings in a CD-ROM or printed book format. Both can be purchased for a nominal fee.
The Technology Corner complements the technical program in that it offers companies the opportunity to exhibit their products and services in an environment that enables discussion and interaction with the managers, engineers, and scientists attending ECTC.
The ECTC would not be possible without the sponsorship of the IEEE Components, Packaging, Manufacturing Technology Society and the Electronic Components, Assemblies, and Materials Association (the components sector of the Electronic Industries Alliance) and numerous corporate participants and sponsors.
The Executive Committee of the ECTC and the Program Committees, composed of more than 100 engineers and scientists who contribute their time and energy to this conference, hope you find the 51st ECTC to be the premier international meeting for microelectronic packaging, components, and systems technologies.

More information on the conference can be found at the ECTC website: www.ectc.net.

Please join us at this year's conference.

Wayne J. Howell
IBM

51st ECTC - Technical Sessions

Sub-Committee Session Titles

Advanced Packaging High Performance Packaging
Stacked Chip and SOP Technologies
Novel Packaging Technology
Flip Chip Packaging Technology
Wafer Level and Chip-Scale Packaging
Modeling & Simulation Package/Board Design
Simultaneous Switching Noise and Power Distribution
Planar and 3D Interconnect
Materials Response and Failure Prediction
Modeling of Novel Technologies
Design of Simulations and System Reliability
Optoelectronics All Optical Networks and MEMS Packaging
Integration and Passive Alignment
High Speed Packaging
Materials and Reliability
Optical Interconnects
Interconnections Flip Chip and Under Bump Metallization
Lead-Free Interconnections
Advanced Interconnections
Flip Chip Interconnections
Materials & Processing Advanced Substrate Materials
Lead-Free Solders
Underfills - I
Underfills - II
Adhesives
Quality & Reliability Interconnect Reliability
Design for Reliability
Reliability Test Methods
Fatigue and Delamination
Manufacturing Technology Wafer Level Manufacturing and Product Applications
Process Advances in Substrate and PBGA Manufacturing
Components & RF RF MEMS and Systems
Passive Components
Connectors & Contacts Interconnection Systems
Education Electronic Packaging Education - I
Electronic Packaging Education - II
Poster Poster - I
Poster - II