Announcement
Future Directions in IC and Package Design Workshop

sponsored by:
CPMT

organized by:
CPMT Technical Committee on Electrical Design, Modeling, and Simulation (TC-12)

October 27, 2001
Royal Sonesta Hotel
Cambridge, Massachusetts

The goal of this new workshop is to provide a forum to address the future needs associated with the design of next generation ICs and packages. The Technical Program Committee will solicit invited presentations from experts in the university and industrial communities. The workshop will be held in conjunction with the IEEE Topical Meeting on Electrical Performance of Electronic Packaging in order to enhance this conference with presentations that give directions for future requirements and developments in the area of electrical analysis and design. These invited talks will address the following areas:
**System level optimization issues
**Large IC design issues
**Modeling and simulation techniques for large-scale heterogeneous systems
**IC and package measurement and test
**Power distribution issues
**Design techniques and methodologies for digital, RF, mixed signal, low-power, portable systems
**Signal propagation issues
**Portable and cost-performance systems
**Electromagnetic interference
**Packaging for optical, wired, and wireless communication links
**Emerging technologies such as MEMs and their electrical performance issues

The workshop will foster active participation and discussions from all the speakers and attendees during the meeting.

Workshop Chairs:

Alina Deutsch
IBM Watson Research Center

Madhavan Swaminathan

Georgia Institute of Technology

Technical Program Committee:

Ronald Bracken - SRC

Harold Hosack - SRC
Andreas Cangellaris - University of Illinois

Mahadevan Iyer - IME, Singapore
Moises Cases - IBM Austin

George Katopis - IBM Poughkeepsie
Chi-Shih Chang - International SEMATECH, Inc.

Toshio Sudo - Toshiba, Japan
Paul Franzon - North Carolina State University

Gregory Taylor - Intel Oregon
Hartmut Grabinski - University of Hanover, Germany

Lewis Terman - IBM Watson Research

Workshop will be held at the Royal Sonesta Hotel. The address is 5 Cambridge Parkway, Cambridge, Massachusetts 02142-1299, phone: (617) 491-3600, fax: (617) 661-5956. The hotel is holding a block of rooms for participants at a special rate of $125 and the rest at $195 plus 4% city tax and 2.75% CCF tax. Reservations must be made by calling the hotel directly by October 7, 2001 to receive these rates.

Additional information may be obtained from the workshop chairs:

Alina Deutsch
deutsch@ieee.org

phone: (914) 945-2858

fax: (914) 945-2141

 

Madhavan Swaminathan

madhavan.swaminathan@ee.gatech.edu
phone: (404) 894-3340
fax: (404) 894-9959

and the workshop administration:
Paul Baltes
epd@engr.arizona.edu
phone: (520) 621-3054
fax: (520) 621-1443

The workshop is open to all attendees of the IEEE Topical Meeting on Electrical Performance of Electronic Packaging. Attendees interested in only the workshop will be charged a $50.00 fee which will cover lunch, refreshments, and digest of abstracts.