TC-12: Technical Committee on

Electrical Design, Modeling and Simulation

http://www.ewh.ieee.org/soc/cpmt/tc12/

The technical committee has been very active in the last few months. Through the technical committee,
three sessions have been organized for Interpack `01 to be held at Kauai, Hawaii from July 8 - 13, 2001.
The sessions were organized by the technical track chairs James Libous (IBM, USA) and Madhavan Swa-
minathan (Georgia Tech, USA). These sessions include talks by experts in the areas of signal integrity,
power distribution and RF. The 15 papers to be presented at Interpack `01 are listed below along with the
session chairs.

Electrical Design I

Co - Chairs: James Libous, IBM, USA

Joungho Kim, KAIST, Korea

1. Chip-Package Resonance in core power supply structures for High Power Microprocessor. Larry Smith,
SUN Microsystems, USA

2. Electrical Analysis of Multi-processor Computer Systems, Dale Becker, IBM, USA

3. Electrical Characterization of Flip Chip Packages, Kevin Chiang, SPIL

4. Scalable Inductor Design and Measurement, Sung-Hwan Min, Georgia Tech

5. Novel High Speed Interconnect Structure for Package Flex Substrates, Albert Lu, Gintic Institute of Man-
ufacturing Technology

Electrical Design II

Co - Chairs: Ching-Cha Huang, Rambus, USA

Dale Becker, IBM, USA

1. Design, Modeling and Simulation Methodology for Source Synchronous Interfaces, Moises Cases, IBM

2. Effect of power/ground partitioning and stitching capacitor placement on signal integrity and EMI of
multi-layer and multi-power system, Joungho Kim, KAIST, Korea

3. Electrical Characterization of Flip Chip Packages, Nansen Chen, SPIL

4. Design optimization of wire bonding for High Frequency applications, Albert Lu, Gintic Institute of Manu-
facturing Technology, Singapore

5. Mismatch Characterization and Modelization of Thin Film Resistors for Wireless Application, helene Thi-
bieroz, USA

Electrical Design III

Co-Chairs: Moises Cases, IBM, USA

Madhavan Swaminathan, Georgia Tech, USA

1. The evolution of Ceramic Packages for S/390 servers, George Katopis, IBM, USA

2. The Interconnect Design and Analysis of Rambus Memory Channel, Ching-Chao Huang, Rambus, USA

3. Improving Signal Integrity by Incorporating Absorbing Material at the Perimeter of Circuit Boards, Harry
Kroger, SUNY Binghamton, USA

4. Analytical Model for Temperature-Dependent I-V Characteristics and Small-Signal Parameters of GaAs
MESFETS, Anna Gina Perri, Politechnico di Bari

5. A systematic on-wafer characterization technique for Surface Mounted Microwave and RF packages,
Ooi Ban Leong, National University of Singapore, Singapore

TC-12 committee members were involved in the voting for the CPMT sponsorship of the IEEE Signal Prop-
agation on Interconnects (SPI) Workshop. This is a major workshop in the signal integrity area held every
year in Europe. This year, the SPI workshop will be held in Venice, Italy from May 13-16, 2001. TC - 12
endorsed the technical co-sponsorship (for SPI `01) and financial co-sponsorship (SPI `02) by the CPMT
society. The CPMT BOG approved the co-sponsorship. SPI will now be an IEEE Computer Society and
CPMT Society co-sponsored workshop and TC-12 members will be actively involved in the workshop.
More details on the SPI workshop can be found at http://www.tet.uni-hannover.de/SPI.

---Submitted by Madhavan Swaminathan, Chair, TC - 12 and Alina Deutsch, Vice-Chair, TC - 12