International Workshop on Wafer Level Packaging Technology

March 9 - 11, 2001
Braselton, Georgia, USA
Chateau Elan Winery and Resort

FRIDAY, MARCH 9, 2001
4:00 Registration begins
5:30 Welcome Reception/Dinner
6:30 Session 1: Technology Overview
Session Chair: C.P. Wong
6:30 Invited Presentation, Peter Elenius
7:30 "Worldwide Applications and Markets for Wafer-Level Packages," E. Jan Vardaman and
Doug Feicht, TechSearch International, Inc., Austin, Texas
8:00 "Technology Overview of Available WLPs," Phil Garrou
8:30 "Reliability Evaluation of the Wafer Level Packaged FlipFET* Device," Scott Popelar, IC
Interconnect, Colorado Springs, Colorado and Hazel Schofield, International Rectifier,
United Kingdom

SATURDAY, MARCH 10, 2001
7:00 Continental Breakfast
8:00 Session 2: Wafer Level Underfill and WLP Assembly
Session Chair: Larry Crane
8:00 Invited Presentation
9:00 "Wafer Level Underfill - Processing and Reliability," Luu Nguyen, National
Semiconductor Corp., Santa Clara, California
9:30 Coffee Break
10:00 "On the Path to Nirvana: A Bullet-proof Underfill Process for Direct Chip Attach," Arun K.
Chaudhuri, Matthew R. Walsh, Frank Stepniak, William D. Higdon, Delphi Delco
Electronics Systems and Robert L. D. Zenner, Mike A. Kropp, Scott B. Charles, Robert J.
Kinney, F. Bruce Li, 3M Corporation
10:30 "Acoustic Inspection of Bonded and Bumped Wafers," John Goings, Sonix, Inc.,
Springfield, Virginia
11:00 "Development and Reliability of Wafer Scale Applied Reworkable Fluxing Underfill for
Direct Chip Attach," Larry Crane, Mark Konarski, Erin Yaeger, Loctile Inc., Marc Chason,
Jan Danvir, Rober Doot, Jing Qi, Matt Kasapbasioglu, Motorola Inc., Wayne Johnson,
Auburn University
11:30 Lunch
12:00 Keynote Presentation

1:00 Session 3: WLP Materials
Invited Presentation
2:00 "Thick Resist For Production Cost Saving," Clifford J. Hamel, Karl Suss America,
Waterbury Center, Vermont
2:30 Coffee Break
3:00 "Variable Frequency Microwave Curing of Benzocyclobutene," Ravindra V. Tanikella,
Paul A. Kohl, and Sue A. Bidstrup Allen, Georgia Institute of Technology, Atlanta,
Georgia
3:30 "Photosensitive Resin Coated Copper Foil for Wafer Level Package," Hitoshi Kawaguchi,
Sumitomo Bakelite Co., Ltd., Japan
4:00 "Dynamic Mechanical Analysis of Surface Mount Solder," Carl R. Taylor, Charles, J.
Aloisio, and Robert W. Kotlowitz, Lucent Technologies/Bell Labs
5:30 Reception
6:00 Dinner
7:00 Keynote Presentation

SUNDAY, MARCH 11, 2001
7:00 Continental Breakfast
8:00 Session 4: WLP Constructions and WLP Reliability
Session Chair: Luu Nguyen
8:00 Invited Presentation
9:00 "Wafer Level Packaging, based on electroless Plating, on a compliant dielectric -
ElastoPac," T. Oppert, T. Teutsch, E. Zakel, Pac Tech - Packaging Technologies GmbH,
and R. Blankenhorn, Pac Tech USA
9:30 Coffee Break
10:00 "Polymer Collar - A Technology to Improve Solder Joint Reliability," Peter Elenius,
10:30 "Monolithically Processed Vertical Interconnects for 3D Microwave Circuits," Qinghua
Kang, Bosui Liu, Altan M. Ferendeci, University of Cincinnati, Cincinnati, Ohio and
Misoon Mah, AFRL-SNDI, Wright Patterson AFB, Ohio
11:00 "Three Dimensional LSI Chip Stacking with Through Hole Electrode in Silicon Wafer," M.
Hoshino, K. Takahashi, H. Yonemura, M. Tomisaka, Y. Tomita, Y. Yamaji, T. Sato, T.
Morifuji, M. Sunohara, and M. Bonkohara, Tsukuba Research Center, Japan
11:30 Workshop Adjourn