InterPACK Sends TC-12 to Hawaii
The TC-12 committee organized the three electrical sessions of the Electrical Design, Simulation, and Test track for the InterPACK 2001 Conference which was held at the Hyatt Regency Resort & Spa, Kauai, Hawaii, July 8-13, 2001. InterPACK is an internationally recognized biennial conference whose objectives are international cooperation, understanding, and promotion of efforts and disciplines in microelectronics, microwave/millimeter-wave, optoelectronics, and microelectromechanical systems (MEMS) packaging. InterPACK 2001 had a very strong technical program with 8 keynote speeches and 259 papers which were presented in 13 tracks with a total of 79 presentation sessions and 7 panel sessions. The tracks were organized by ASME, JSME, and IEEE/CPMT members. The participants were from Brazil, Canada, China, France, Germany, Japan, Korea, Singapore, Sweden, Taiwan, United Kingdom, United States, and many other countries.
The Electrical Design, Simulation, and Test track sessions were organized by the technical track chairs James Libous (IBM, USA) and Madhavan Swaminathan (Georgia Tech, USA). These sessions included talks by experts in the areas of signal integrity, power distribution and RF. The four papers in Session I discussed modeling of chip-package power distribution resonance, signal integrity analysis techniques for a multi-processor computer system, frequency domain characterization of MCM-L embedded inductors, and a novel high-speed interconnect structure on single metal layer flex substrates. The four papers in Session II addressed design issues and solutions for high-speed source-synchronous interfaces utilizing double data transfer rate timing protocols, the effects of power/ground isolation and stitching capacitors on signal integrity, crosstalk, and radiated emission in multi-power systems, a controlled impedance design methodology for high frequency wire bonding applications, and electronic control of diesel engines. The five papers in Session III discussed the evolution of MCM technology for high end servers, interconnect design and analysis of the Rambus memory channel, signal integrity improvements by reducing PCB power plane resonances with perimeter absorbing material, a 2-D I-V MESFET model coupled with a 3D thermal model, and a systematic approach of on-wafer characterization of a TSSOP package for microwave and RF applications. The 13 papers presented are listed below along with the session chairs.
Electrical Design I
Co - Chairs: James Libous, IBM, USA
Joungho Kim, KAIST, Korea
1. Chip-Package Resonance in Core Power Supply Structures for High Power Microprocessor. Larry Smith, SUN Microsystems, USA
2. Electrical Analysis of Multi-processor Computer Systems, Dale Becker, IBM, USA
3. Scalable Inductor Design and Measurement, Sung-Hwan Min, Georgia Tech
4. Novel High Speed Interconnect Structure for Package Flex Substrates, Albert Lu, Gintic Institute of Manufacturing Technology
Electrical Design II
Co - Chairs: Ching-Cha Huang, Rambus, USA
Dale Becker, IBM, USA
1. Design, Modeling and Simulation Methodology for Source Synchronous Interfaces, Moises Cases, IBM, USA
2. Effect of Power/Ground Partitioning and Stitching Capacitor Placement on Signal Integrity and EMI of Multi-Layer and Multi-Power System, Joungho Kim, KAIST, Korea
3. Design optimization of wire bonding for High Frequency applications, Albert Lu, Gintic Institute of Manufacturing Technology, Singapore
4. Electronic Control of Generator Diesel Engine, Jurij Avsec, University of Maribor
Electrical Design III
Co-Chairs: Moises Cases, IBM, USA
Madhavan Swaminathan, Georgia Tech, USA
1. The Evolution of Ceramic Packages for S/390 Servers, George Katopis, IBM, USA
2. The Interconnect Design and Analysis of Rambus Memory Channel, Ching-Chao Huang, Rambus, USA
3. Improving Signal Integrity by Incorporating Absorbing Material at the Perimeter of Circuit Boards, Harry Kroger, SUNY Binghamton, USA
4. Analytical Model for Temperature-Dependent I-V Characteristics and Small-Signal Parameters of GaAs MESFETS, Anna Gina Perri, Politechnico di Bari
5. A systematic on-wafer characterization technique for Surface Mounted Microwave and RF Packages, Ooi Ban Leong, National University of Singapore, Singapore