Wanted SoC -- Dead or Alive?

At the conferences and publications of our CPMT Society there are often firm statements about the nature of the future of microsytems. In particular the argument is typically couched as SoC or SiP -- "System on a Chip" or "System in a Package." Most members operate within a one year horizon and probably have taken these arguments lightly. However, it is not just a debate on those of us who are rooted in assembly and packaging, but this year the debate has publicly broken out among the chip makers.

As reported in the EE Times by David Lammers, the IEEE ISSCC in February had a talk by Jay Heeb of Intel in which the system-on-chip movement was declared "dead." The culprit is the cost of masks and additional processing to get logic, memory, MEMs, opto, and analog functions on the same chip. The economic way to do this, according to Heeb is by making 3-D structures by assembly. He calls this future the So3D, system-in-3D package. He sees this future hybridization of different chips occurring by "molecular velcro" or "capacitive coupling."

In strong contrast, Avner Goren of Texas Instruments pointed out that the recent Bluetooth products under development by TI. Combining digital CMOS with memory blocks they are merging the baseband function with a digital radio and integrated power management for GSM phones. The power amp and bigger passives must still be applied around the chip. Of course the proof will be in the economics, but TI is hoping to reuse blocks of designs to decrease costs.