Toshio Sudo new Fellow

Toshio Sudo joined Toshiba Corporation, Japan, in 1975, where he has devoted himself to the development of high-density multi-chip modules to overcome the limitation of thick-film technology. His earlier development of copper/polyimide thin-film process on a silicon wafer has been presented since late 80's(ISHM'88, ECTC'90, IEICE'91, JSSC'95). He received the best paper award for this achievement in the Microelectronics Symposium in 1989 in Japan. He also contributed to the development of the high-pin count packaging for CMOS ASICs and microprocessors so as not to induce a large amount of simultaneous switching noise (SSN). He disclosed a lot of experimental data of SSN and package modeling approach in the 90's (ECC'89, EPEP'93, ECTC'94, '95, '96) by using a dedicated test chip. Furthermore, he presented many papers on the on-chip crosstalk noise of GaAs interconnects and the characterization of chip/package-level EMI (EMC'01, SPI'02). Toshio Sudo co-edited three books on the VLSI packaging technology including the translation to Japanese of the Microelectronics Packaging Handbook, 1st edition, Van Nostrand Reinhold ('91), and the contribution as a co-author to the 2nd edition, Chapman & Hall ('97).