Announcement
2006 System Packaging Japan Workshop
Jan. 30-Feb. 1, 2006
Hakone, Japan


      The Systems Packaging Japan Committee would like to invite you to participate in the 2006 IEEE Systems Packaging Japan Workshop to be held at the Hotel de YAMA, in Hakone town, Japan on January 30th through February 1st, 2006. Hotel de YAMA is in the beautiful mountainous resort area of Hakone and it can be reached in about two hours from Tokyo by train and bus. (See: travel information.)

      This workshop will be the eleventh one since its inception in 1986. It has a long and rich history beginning as the Computer Packaging Workshop and subsequently becoming the Systems Packaging Workshop as products, other than mainframes, began to drive the leading edges of the various technologies that make up an electronic system. At its inception, the workshop was predominantly for digital technologies. Now RF, analog, mixed and digital subjects are covered.

      In addition, systems packaging technologies for all types of electronic systems such as: computers, telecommunications, networks, military, automotive, robotics, etc., are included. Since packaging is the "glue" that ties all technology elements together, the workshop deals with all the design elements of an electronic product. The presentations include the rationale behind the choices made for: architecture, chips, modules, boards, power distribution, signal integrity plus cooling and the ways they apply to overall system optimization.

      This 2006 workshop's content and schedule are shown in the program. Note that the organizing committee is planning a technical tour on Wednesday.

      The workshop will be held in English. All attendees are expected to be knowledgeable in the field and to participate in the discussions. The discussion focus will be on technologies destined for the market in 5 - 10 years from now. For further information about the workshop, please look at the registration information. We are confident that your attendance at this technical meeting will be both useful and enjoyable.

      The workshop sessions are as follows:

For any questions you may have, please contact the Program Chair: Hiroshi Go at hiroshi.go.wt@hitachi.com.

General Chair:
Fumiyuki Kobayashi, Hitachi, Ltd.
fumiyuki.kobayashi@itg.hitachi.co.jp
 
Vice Chair:
Haruhiko Yamamoto, Fujitsu ICT
yamamoto@fict.fujitsu.com
 
Treasurer:
Masakazu Yamamoto, Hitachi, Ltd.
masakazu.yamamoto.fm@hitachi.com
 
Japanese Committee:
All above workshop officers
Yoshitaka Fukuoka, WEISTI
Yuzo Shimada, NEC Corporation
Tohru Kishimoto, NTT-AT
Yutaka Tsukada, Kyocera SLC
Kuniaki Takahashi, Toshiba
Shigeyuki Ogata, Nangano Oki Electric Co., Ltd.
Michitaka Kimura, Renesas Technology Corp.
Seiichi Saito, Mitsubishi Electric Corporation
Masahiro Suzuki, Fujitsu
Kishio Yokouchi, Fujitsu
Tatsuya Saito, Hitachi
 Yoichi Taira, IBM Japan
Kazunori Nakajima, Hitachi
Koichi Koyano, Hitachi

European Committee:
Erich Klink, IBM Germany
Eric Beyne, IMEC
Rolf Aschenbrenner, Fraunhofer IZM
Cian Ó Mathúna, Tyndall National Institute
 
US Committee:
Robert W. Guernsey, IBM Corporation
George A. Katopis, IBM Corporation
Robert C. Pfahl, iNEMI
Iwona Turlik, Motorola, Inc.
Aroon V. Tungare, Motorola, Inc.
Leonard W. Schaper, University of Arkansas
William Samaras, Intel Corporation
Evan Davidson, IEEE

Advisors:
Tadao Ichikawa, IT-Serve
Toshihiko Watari, Niigata Fuji Xerox Manufacturing
Akira Masaki, Okayama University
Hiroshi Shibata, Osaka Institute of Technology



Technical Committee Home