Editor:  Wu, An-Yeu (Andy)    Email:   click to email
Brief Bio:  An-Yeu (Andy) Wu received the B.S. degree from National Taiwan University in 1987, and the M.S. and Ph.D. degrees from the University of Maryland, College Park in 1992 and 1995, respectively, all in Electrical Engineering. From August 1995 to July 1996, he was a Member of Technical Staff (MTS) at AT&T Bell Laboratories, Murray Hill, NJ, working on high-speed transmission IC designs. In August 2000, he joined the faculty of the Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University (NTU), where he is currently a Professor. His research interests include low-power/high-performance VLSI architectures for DSP and communication applications, adaptive/multirate signal processing, reconfigurable broadband access systems and architectures, and SoC platform for software/hardware co-design. Dr. Wu served as an Associate Editor for EURASIP JOURNAL OF APPLIED SIGNAL PROCESSING from 2001 to 2004, and acted as the leading Guest Editor for a special issue on Signal Processing for Broadband Access Systems: Techniques and Implementations of the same journal (published in December 2003). He had served as the Associate Editor of IEEE TRANSACTIONS ON VERT LARGE SCALE INTEGRATION (VLSI) SYSTEMS from 2003 to 2005, and IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS in 2007. He is now the Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS. He also served on the technical program committees of many major IEEE International Conferences, such as SiPS, AP-ASIC, ISCAS, ISPACS, ICME, SOC, and A-SSCC. Since August 2007, he is on leave from NTU and serves as the Deputy General Director of SoC Technology Center (STC), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan.
Focus:  VLSI architectures for DSP and communications
Copyright 2003 IEEE Signal Processing Society