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JSSC Best Paper Award Print E-mail

Best Papers in the Journal of Solid-State Circuits

The annual award to recognize the best paper published in the IEEE Journal of Solid-State Circuits is judged on the basis of outstanding achievement, significance, clarity of presentation, timeliness. The authors are awarded a certificate and monetary prize at the ISSCC. Links connect to the abstract in Xplore where login authentication will be requested to view the article.

This award is managed by the Editors of JSSC.

2007

John Poulton, Robert Palmer, Andrew Fuller, Trey Greer, John Eyles, William Dally and Mark Horowitz
A 14-mW 6.25-Gb/s Transceiver in 90-nm CMOS
Volume: 42, Issue: 12, December 2007, Pages:2745 - 2757

2006

Jonathan B. Ashbrook, Hyeon-Min Bae, Sanjiv Chopra, Jinki Park, Naresh R. Shanbhag and Andrew C. Singer
An MLSE Receiver for Electronic Dispersion Compensation of OC-192 Fiber Links Digital

Volume: 41, Issue: 11, November 2006, Pages:2541-2554

2005

Drs. Michiel. A. P. Pertijs, Kofi A. A. Makinwa, and Johan H. Huijsing
A CMOS smart temperature sensor with a 3s inaccuracy of + 0.1° C from -55° C to 125° C
Volume: 40, Issue: 12, December 2005, Pages:2805 - 2815

2004

Xiang Guan, Hossein Hashemi and Ali Hajimiri
A Fully Integrated 24-GHz Eight-Element Phased-Array Receiver in Silicon

Volume: 39 , Issue: 12, December 2004, Pages:2311 - 2320

2003

Manstretta, Danilo.; Brandolini, Massimo.; Svelto, Francesco
Second-order intermodulation mechanisms in CMOS downconverters
Volume: 38 , Issue: 3, March 2003, Pages:394- 406

2002

Alireza Shirvani, David K. Su, and Bruce A. Wooley
A CMOS RF power amplifier with parallel amplification for efficient power control
Volume: 37 , Issue: 6 , June 2002, Pages:684 - 693

2001

Marko Sokolich, Charles H.Fields, Stephen Thomas III, Binqiang Shi, Young Kim Boegeman, Mary Montes, Rosanna Martinez, Allan R. Kramer, and Meena Madhav
A low-power 72.8-GHz Static Frequency Divider in AlInAs/InGaAs HBT Technology
vol. 36, pp. 1328 - 1333, September 2001

2000

Ichiro Fujimori, Akihiko Nogi, and Tetsuro Sugimoto
A Multibit Delta–Sigma Audio DAC with 120-dB Dynamic Range
vol. 35, pp. 1066 - 1073, August 2000.

1999

Brian P. Brandt and Joseph Lutsky
A 75-mW, 10-b, 20-MSPS CMOS Subranging ADC with 9.5 Effective Bits at Nyquist

vol. 34, pp. 1788 - 1795, December 1999.

1998

Mark. J. Loinaz, K. J. Singh, Andrew. J. Blanksby, David A. Inglis, Kamran. Azadet, and Brain Ackland
A 200-mW, 3.3-V, CMOS Color Camera IC Producing 352 × 288 24-b Video at 30 Frames/s
vol. 33, pp. 2092 - 2103, December 1998.

1997

Todd L. Brooks, David H. Robertson, Daniel F. Kelly, Anthony Del Muro, and Stephen W. Harston
A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR
vol. 32, pp. 1896 - 1906, December 1997.

1996

Takanori Saeki, Yuji Nakaoka, Mamoru Fujita, Akihito Tanaka, Kyoichi Nagata, Kenichi Sakakibara, Tatsuya Matano, Yukio Hoshino, Kazutaka Miyano, Satoshi Isa, Shigeyuki Nakazawa, Eiichiro Kakehashi, John M. Drynan, MasahirKomuro, Tadashi Fukase, Haruo Iwasaki, Motohiro Takenaka, Junichi Sekine, Masahiko Igeta, Nobuko Nakanishi, Toshiro Itani, Kazuyoshi Yoshida, Hiroshi Yoshino, Syuichi Hashimoto, Tsuyoshi Yoshii, Michihiko Ichinose, Tomoo Imura, Masato Uziie, Shinichi Kikuchi, Kuniaki Koyama, Yukio Fukuzo, and Takashi Okuda

A 2.5-ns Clock Access, 250-MHz, 256-Mb SDRAM with Synchronous Mirror Delay
vol. 31, pp. 1656- 1668, November 1996

1995

Loke Kun Tan and Henry Samueli
A 200 Mhz Quadrature Digital Synthesizer/Mixer in 0.8 mm C.M.O.S.
vol. 30, pp. 193-200, March 1995

1993

Michiel de Wit. Khen-San Tan. and Richard K. Hester
A Low-Power 12b Analog-to-Digital Converter with On-Chip Precision Trimming
vol. 28, pp. 455 - 461, April 1993

 

Last Updated ( Thursday, 14 August 2008 )