Tutorial B

 

DANIELE IELMINI, Politecnico di Milano, Italy

Title: Emerging nonvolatile memory technology for storage and computing

Abstract: In the era of big data, semiconductor memory devices must fulfill two main tasks: (i) storing a large amount of data in fast, high density, nonvolatile memory arrays, and (ii) facilitating computation within the data, to enable machine learning algorithms with improved speed and energy efficiency. To meet these challenging objectives, a class of emerging memory technologies are currently being developed. Device concepts include resistive switching memory (RRAM), phase change memory (PCM), spin-transfer torque magnetic memory (STT-MRAM) and ferroelectric memory (FeRAM). These devices have unique physical mechanisms, technology, and reliability issues that require detailed understanding from the materials, device, circuit, and algorithm standpoints.

In this tutorial, I will provide an overview of the physical mechanisms of switching, the device architecture, and the technology demonstrators for the main nonvolatile emerging memories. The applications as potential RAM/Flash replacement, embedded memory, and storage lass memory will be reviewed, with reference to the array architecture, e.g., crosspoint or transistor-selected structure. A brief overview of the selector technology for high density crosspoint arrays will be given. Finally, the opportunities for in-memory computing with emerging nonvolatile memories will be summarized for analogue, digital, and neuromorphic computing scenarios.

Biography: Daniele Ielmini is a Professor at the Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Italy. He received the Laurea (cum laude) and Ph.D. in Nuclear Engineering from Politecnico di Milano in 1995 e 2000, respectively. He held visiting positions at Intel Corporation (2006) and Stanford University (2006). He conducts research on non-volatile memory technologies and advanced schemes for computing within the memory. He authored/coauthored 10 book chapters, more than 250 papers published in international journals and presented at international conferences, and 7 patents. He has served in several Technical Subcommittees of international conferences, such as IEEE-IEDM (2008-2009, 2017-2018), IEEE-IRPS (2006-2008), and IEEE-ISCAS (2016-2018). He is Associate Editor of IEEE Trans. Nanotechnology and Semiconductor Science and Technology (IOP). He received the Intel Outstanding Researcher Award in 2013, the ERC Consolidator Grant in 2014, and the IEEE EDS Paul Rappaport Award in 2015.