Multi-Layer Stacked Nanosheet Hetero-Structure Realized by Layer Transfer Technology for CFET Application.
Biography:Dr. Chang is currently a senior researcher with the Device Technology Research Institute in National Institute of Advanced Industrial Science and Technology (AIST), Japan. Dr. Chang earned a BS degree in Materials Science and Engineering from National Chiao Tung University, Taiwan and received the Ph. D degree in Materials Science and Engineering from National Tsing Hua University, Taiwan. Her doctor thesis was on high performance III-V MOSFETs for ultimate CMOS. Dr. Chang joined AIST in 2014 as a postdoc researcher and became the senior researcher in 2022. Dr. Chang has published more than 40 papers on HKMG quality, process engineering and MOSFETs performance. Her main research interests include fundamental studies of high-k gate dielectric, GeOI structure with ultrathin body for MOSFETs application, and layer transfer technology for 3D IC integration.