High Frequency Characterization and Modeling of Low and High Voltage FinFETs
Biography: Yogesh Singh Chauhan is a professor at Indian Institute of Technology Kanpur, India. He is the developer of several industry standard models: ASM-HEMT, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research interests are characterization, modeling, and simulation of semiconductor devices.
He is the Fellow of IEEE and Indian National Academy of Engineering. He is the Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He is the chair of IEEE-EDS Compact Modeling Committee. He is the founding chairperson of IEEE Electron Devices Society U.P. chapter and chairman-elect of IEEE U.P. section. He has published more than 300 papers in international journals and conferences.