Gradient-free Learning based on the Kernel and the Range Space

Prof. Kar-Ann Toh, Yonsei University, Seoul, Korea

Organized by EXQUISITUS, Centre for System Intelligence and Efficiency & IEEE Industrial Electronics Singapore Chapter & IEEE Circuits and Systems Singapore Chapter

Abstract

In this talk, we show that solving the system of linear equations by manipulating the kernel and the range space is equivalent to solving the problem of least squares error approximation. This establishes the ground for a gradient-free learning search when the system can be expressed in the form of a linear matrix equation. When the nonlinear activation function is invertible, the learning problem of a fully-connected multilayer feedforward neural network can be adapted for this novel learning framework. By a series of kernel and range space manipulations, it turns out that such a network learning boils down to solving a set of cross-coupling equations. By having the weights deterministically or randomly initialized, the equations can be decoupled and the network solution shows relatively good learning capability for real world data sets of small to moderate dimensions. Based on the structural information of the matrix equation, the network representation is found to be dependent on the number of data samples and the output dimension.

Speaker Biography

Kar-Ann Toh is a Professor in the School of Electrical and Electronic Engineering at Yonsei University, South Korea. He received the PhD degree from Nanyang Technological University (NTU), Singapore. Since then, he worked for two years in the aerospace industry prior to his post-doctoral appointments at research centers in NTU from 1998 to 2002. He was affiliated with the Institute for Infocomm Research in Singapore from 2002 to 2005 prior to his current appointment in Korea. His research interests include pattern classification, machine learning, neural networks and biometrics. He is a co-inventor of two US patents and has made several PCT filings related to biometric applications. Besides being active in publications, Dr. Toh has served as an advisor/co-chair/member of technical program committee for international conferences related to biometrics and artificial intelligence. He is/has serving/served as an Associate Editor of several international journals including IEEE Transactions on Biometrics, Behavior and Identity Science, IEEE Transactions on Information Forensics and Security, Journal of Franklin Institute, Pattern Recognition Letters, and IET Biometrics.

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Enhancing Deep BP Learning with Omnipresent Supervision Training Paradigm

Prof. SY Kung, Princeton University

Organized by Department of Electrical and Computer Engineering, NUS & IEEE Circuits and Systems Singapore Chapter

Abstract

AI2.0 relies on Deep Learning Networks (DLNs) so that both ConvNet and MLP parameters may be collectively learned via the back-propagation (BP) learning, using regression-based metrics. However, the conventional BP on DLNs is constantly haunted by the curse of depth. To counteract this problem, we propose an Omni-present Supervision (OS) learning paradigm. This paradigm is based on classification-based metrics with two motivations: (a) it is biologically inspired (human brains constantly retiring thousands of neurons daily) and (b) it rings well with "Explainable AI" (XAI) championed by DARPA. Both stress interpretability of internal hidden neurons. Along this vein, we develop an EM-type BPOS learning algorithm, alternating between two steps: (i) Net Updating to trim hidden neurons via the internal OS learning and (ii) Weight Updating via external BP learning. We shall showcase our experimental studies demonstrating that BPOS can indeed deliver improved accuracy with substantial hardware saving, i.e. it has the best of the two worlds.

Speaker Biography

Sun-Yuan Kung, Life Fellow of IEEE, is a Professor at Department of Electrical Engineering in Princeton University. His research areas include multimedia information processing, machine learning, systematic design of deep learning networks, VLSI array processors, and compressive privacy. He was a founding member of several Technical Committees (TC) of the IEEE Signal Processing Society. He was elected to Fellow in 1988 and served as a Member of the Board of Governors of the IEEE Signal Processing Society (1989-1991). He was a recipient of IEEE Signal Processing Society's Technical Achievement Award for the contributions on "parallel processing and neural network algorithms for signal processing" (1992); SPS Distinguished Lecturer (1994); IEEE SPS Best Paper Award; and IEEE Third Millennium Medal (2000). Since 1990, he has been the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. He has authored 5 textbooks, the most recent being ``Kernel Methods and Machine Learning”, Cambridge University Press (2014).

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Systematical Design Methodology of Deep Learning Networks

Prof. SY Kung, Princeton University

Organized by College of Engineering Distinguished Speaker Lecture Series, NTU & IEEE Circuits and Systems Singapore Chapter

Abstract

Despite of the promising versatility of Deep Learning Networks (DLNs, they have been viewed as ad-hoc learning techniques. This prompts us to explore methodic and systematic design of (deep) machine learning models. Machine learning may be viewed from two angles: On one hand, memorization can be viewed simply as a pure optimization problem to maximize the Training Accuracy based on the training dataset. Via the Universal Approximator (UA) theorem, a perfect training accuracy is always attainable for any arbitrary kind of data dimension/distribution. On the other hand, generalization involves performance based on unknown (and futuristic) prediction dataset. According to the No Free Lunch (NFL) Theorem, no machine learning algorithm may universally generalize any better than another algorithm. Obviously, NFL is overly pessimistic while UA is too optimistic. It is vital to bridge the discrepancy between the pure optimization and generalization problems which also pave a way to strive for systematic design of DLNs. To this end, this talk will methodically address four primary design gaps/issues (collectively known the DONA gaps): (1) Data-distribution gap, (2) Optimization-metric gap (3) Network capacity gap, and finally (4) Algorithmic gap.

Speaker Biography

Sun-Yuan Kung, Life Fellow of IEEE, is a Professor at Department of Electrical Engineering in Princeton University. His research areas include multimedia information processing, machine learning, systematic design of deep learning networks, VLSI array processors, and compressive privacy. He was a founding member of several Technical Committees (TC) of the IEEE Signal Processing Society. He was elected to Fellow in 1988 and served as a Member of the Board of Governors of the IEEE Signal Processing Society (1989-1991). He was a recipient of IEEE Signal Processing Society's Technical Achievement Award for the contributions on "parallel processing and neural network algorithms for signal processing" (1992); SPS Distinguished Lecturer (1994); IEEE SPS Best Paper Award; and IEEE Third Millennium Medal (2000). Since 1990, he has been the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. He has authored 5 textbooks, the most recent being ``Kernel Methods and Machine Learning”, Cambridge University Press (2014).

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Further Optimization of FRM Filters

Prof. Tapio Saramaki, Tampere University of Technology, Finland

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

Various approaches to synthesizing finite impulse response (FIR) filters based on the frequency response masking (FRM) technique are considered. Among these FRM FIR filters, interpolated FIR (IFIR) are treated as special cases.

Originally, FRM FIR filters have been synthesized by first designing the masking filters using either linear programming or the Remez algorithm and then the periodic filter. The second approach is based on iteratively designing the masking filter pair (each masking filter pair for multistage designs) and the periodic filter until the difference between successive overall filters is within the given tolerance limits. The third approach is to apply nonlinear optimization. These three approaches are compared with each other in terms of achievable filter complexities and the ability of implementing the resulting filters efficiently in practice.

For IFIR filters, the design is drastically simplified and the overall filter synthesis can be done based on iteratively designing the sub filters using the efficient Remez algorithm.

Finally, it is shown that both FRM and IFIR filters can be designed so that their overall order differs only slightly from those of the direct-form FIR filters, but at the same time, the computational complexity in the filter implementation is significantly reduced

Speaker Biography

Tapio Saramaki was born in Orivesi, Finland, in 1953. He has received the Diploma Engineer (with honors) and Doctor of Technology (with honors) degrees in electrical engineering from the Tampere University of Technology (TUT), Tampere, Finland, in 1978 and 1981, respectively. From 1977, he has held various research and teaching positions at TUT. He was a Professor of Digital Signal Processing and a Docent (Adjunct Professor) of Communications until becoming an Emeritus Professor in 2016.

Dr. Saramaki is also a Co-Founder and a System-Level Designer of VLSI Solution, Finland, specializing in efficient VLSI implementations of both analog and digital signal processing algorithms for various applications. His research interests are in digital signal processing, especially in filter and filter bank design, efficient VLSI implementations of DSP algorithms, and communications application as well as approximation and optimization theories. He has contributed to more than 300 international journals and conference articles as well as more than 10 international book chapters. He holds three worldwide used patents.

Dr. Saramaki is the Fellow of IEEE and the Russian A. S. Popov Society for Radio-Engineering, Electronics, and Communications. He was a recipient of the 1987 and 2007 IEEE Circuits and Systems Society’s Guillemin-Cauer Awards as well as two other best paper awards. He is a founding member of the Median-Free Group International.

He has paid numerous research visits to many international universities. The countries include Argentina, Brazil, Canada, China, India, Norway, Mexico, Singapore, Sweden, and USA. He is a founding member of the Median-Free Group International.

Dr. Saramaki has been actively taking part in many duties to the IEEE Circuits and Systems Society’s DSP Committee by being a Chairman (2002-2004), a Distinguished Lecturer (2002-2003), and a Track or a Co-Track Chair for many ISCAS symposiums (2003-2005 and 2011-2019). Furthermore, he has been on the technical committee of several international conferences including, among others, DSP, DSPA, EUSIPCO, ECCTD, IASTED, ICECS, ISPA, and NORCAS.

Iterative Learning Control and Its Application on Artificial Pancreas

Prof. Youqing Wang, Beijing University of Chemical Technology, China

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Industrial Electronics Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Abstract

This presentation proposes to utilize advanced control algorithms with insulin pumps and CGM sensors to improve glycemic performance in persons with type 1 diabetes mellitus (T1DM). It is evident that there exist repetitive cycles in glucose-meal-insulin dynamics, e.g., dietary habit and circadian variation of hormone levels. To exploit the repetitive nature of glucose-meal-insulin dynamics, a novel combination of iterative learning control (ILC) and model predictive control (MPC), referred to as learning-type MPC (L-MPC), was recently proposed for closed-loop control of an artificial pancreas by the applicant and his colleagues. Clinical trial results show that L-MPC can learn from an individual’s lifestyle, inducing the glucose control performance to improve from day to day. Theoretically, L-MPC belongs to indirect ILC. This presentation also introduces some stability analysis results for general indirect ILC.

Speaker Biography

Youqing Wang (M’09-SM’12) received the B.S. degree from Shandong University, Jinan, Shandong, China, in 2003, and PhD degree in Control Science and Engineering from Tsinghua University, Beijing, China, in 2008. From 2006 to 2007, he was a Research Assistant at the Department of Chemical Engineering, The Hong Kong University of Science and Technology, Hong Kong. From 2008 to 2010, he was a Senior Investigator at the Department of Chemical Engineering, University of California, Santa Barbara, CA, USA. In 2015, he joined the University of Alberta in Edmonton, AB, Canada, as a Visiting Professor. He is currently a Professor at Beijing University of Chemical Technology, and also Shandong University of Science and Technology and. His research interests include fault-tolerant controls, state monitoring, modeling and control of biomedical processes (e.g., artificial pancreas system), and iterative learning controls. Dr. Wang was a recipient of several research awards, including the Journal of Process Control Survey Paper Prize and ADCHEM2015 Young Author Prize.

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Trend towards SW-defined radar with fully digital antenna

Mr. Erwin de Jong, THALES Solutions Asia, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

Changing missions and an increasingly more diverse threat set pose more stringent and often contradicting requirements on radar systems in the naval and ground-based domains. The radar trend in these domains to cope with these challenges is towards a fully digital front-end using dual-axis multi-beam combined with a software-defined back-end. The concept of this software-defined radar also yields the possibility of Incremental Capability Upgrades. This allows for more gradual updated, upgraded and added capabilities to the radar system, anticipating the ever faster changing environment.

Speaker Biography

Erwin de Jong has been working with THALES Netherlands for 22 years. He started as radar engineer of tracking radars and fire control radars. Later he was a radar architect, system engineering manager and design authority of multifunction radars and surface surveillance radars. The last two years he headed the Centre of Excellence for Radar and Integrated Sensors at THALES Solutions Asia here in Singapore. In this function he collaborated with the innovative, Singapore ecosystem in the radar domain, including the NTU.

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Neuromorphic computing and its current state-of-art

Dr. Yansong Chua, Institute for Infocomm Research (I2R), A*STAR, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Abstract

This presentation aims to introduce neuromorphic computing to the broader machine learning/ computer science community. The speaker will discuss, how he thinks it is different from deep learning, why it is necessary (from both learning and hardware perspective), the many challenges it faces, some of the current state-of-art, and where he thinks it should be heading towards.

Speaker Biography

Chua Yansong did his bachelors and Masters at the School of Computing, National University of Singapore. He then went on to do his PhD in Biology (specializing in Computational Neuroscience) at the Bernstein Centre Freiburg, which is affiliated with Albert Ludwig University of Freiburg, Germany. He then joined Institute for Infocomm Research (I2R), A*STAR, as a researcher, before becoming the Principal Investigator of work package 5 under the A*STAR neuromorphic programme, a 4 year programme involving several other research institutes at A*STAR and also faculty members from both National University of Singapore and Nanyang Technological University. He is interested in brain inspired computing, and hopes that machines learn with less labels, are more intelligent, and have a much smaller carbon footprint.

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Computational brain imaging and applications in neuropsychiatric disorders

Assoc Prof. Juan Helen Zhou, Duke-National University of Singapore Medical School, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Abstract

Previous work has demonstrated that the spatial patterning of each neurodegenerative disease relates closely to a distinct functional intrinsic connectivity network mapped in the healthy brain with “resting-state” functional MRI. This talk will first describe how brain network-sensitive neuroimaging methods shed light on the vulnerable network-breakdown mechanisms in different neurodegenerative disorders. I will introduce both structural and functional brain imaging methods and the related computational approaches. Our recent findings on how age and disease pathology influence brain structural and functional networks longitudinally in older adults will be described. Moreover, I will present evidence on how multimodal brain imaging can help identify abnormal trajectory in preclinical individuals and predict clinical outcomes. Lastly, complex network modeling approach of brain dynamic functional connectivity associated with human behavior will be briefly described. Further developed with computational and machine learning approaches, multimodal brain imaging signatures will facilitate early detection, disease prognosis and treatment response prediction.

Speaker Biography

Dr. Juan (Helen) Zhou is an Associate Professor at the Center for Cognitive Neuroscience, Neuroscience and Behavioral Disorders Program, Duke-National University of Singapore Medical School, Singapore. She also holds a joint appointment with Clinical Imaging Research Center, NUS. Her lab studies how selective network-based vulnerability is implicated in neuropsychiatric and neurodegenerative disorders using multimodal neuroimaging and computational approaches.

Prior to joining Duke-NUS in 2011, Helen was an associate research scientist at the Child Study Center, New York University. She did a post-doctoral fellowship at the Memory and Aging Center, Department of Neurology, University of California, San Francisco, from 2008 to 2010 and one-year research fellow with Singapore-MIT Alliance in 2007-2008. Helen received her Bachelor degree in Computer Science and Engineering with first class honour in 2003 under the scholarship from the Ministry of Education, Singapore and her Ph.D. in 2008 from School of Computer Science and Engineering, Nanyang Technological University, Singapore.

Helen has published in multiple international peer-reviewed high impact journals such as Neuron, Brain, PNAS, Neurology, Molecular Psychiatry, Biological Psychiatry, Journal of Neuroscience, NeuroImage, Cerebral Cortex and so on. She is the Council member - Secretary and a program committee member of the Organization of Human Brain Mapping, a member of the IEEE, Society for Neuroscience, American Academy of Neurology, and Alzheimer’s Association. Helen also serves as an Editor of NeuroImage and Associate Editor of other journals. Dr. Zhou has been the recipient of research support from National Medical Research Council and Biomedical Research Council, Singapore as well as the Royal Society, UK.

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Energy Efficient Embedded AI for Artificial Intelligence-of-Things

Prof. Yong LIAN, York Uinversity, Canada

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

Internet-of-Things (IoT) is the inter-networking of physical devices, vehicles, buildings, and objects with embedded sensors. It is estimated that by 2020 there will be more than 34 billion IoT devices connected to the Internet. Nearly $6 trillion will be spent on IoT solutions over the next five years. Artificial Intelligence (AI), on the other hand, is intelligence demonstrated by machines that work and react like humans. The combination of AI and IoT gives birth of Artificial Intelligence-of-Things (AIoT). AIoT devices differ from IoT devices that not only they sense, store, transmit data but also analyze and act on data, i.e. the AIoT device makes a decision or perform a task similar to what a person could do. The enabling technology for the AIoT device is embedded AI. This talk will cover the energy efficient machine learning algorithm that utilizes the continuous-in-time and discrete-in-amplitude (CTDA) signal flow. The CTDA signal flow enables data compression at the input source, which greatly reduces the arithmetic operations in neural network. We will show by examples that the CTDA scheme significantly improves energy efficiency and is well suited for AIoT applications.

Speaker Biography

Yong LIAN received the B.Sc degree from the College of Economics & Management of Shanghai Jiao Tong University in 1984 and the Ph.D degree from the Department of Electrical Engineering of National University of Singapore (NUS) in 1994. His research interests include low power techniques, continuous-time signal processing, biomedical circuits and systems, and computationally efficient signal processing algorithms. His research has been recognized with more than 20 awards including the 1996 IEEE Circuits and Systems Society's Guillemin-Cauer Award, the 2008 Multimedia Communications Best Paper Award from the IEEE Communications Society, 2011 IES Prestigious Engineering Achievement Award, 2013 Outstanding Contribution Award from Hua Yuan Association and Tan Kah Kee International Society, and the 2015 Design Contest Award in 20th International Symposium on Low Power Electronics and Design. He is also the recipient of the National University of Singapore Annual Teaching Excellence Awards in 2009 and 2010, respectively.

Dr. Lian is the President of the IEEE Circuits and Systems (CAS) Society, a member of IEEE Technical Activities Board, Chair of IEEE Periodicals Partnership Opportunities Committee, a member of IEEE Periodicals Committee, a member of IEEE Periodicals Review and Advisory Committee, a member of IEEE Biomedical Engineering Award Committee, and a member of Steering Committee of the IEEE TBioCAS. He was the Editor-in-Chief of the IEEE TCAS-II for two terms, a member of IEEE Fellow Committee for 3 terms, and many leadership positions with IEEE Circuits and Systems Society. He is the founder of BioCAS, ICGCS, and PrimeAsia.

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Efficient FastICA Algorithms and Architectures for EEG Signal Separation

Prof. Lan-Da Van, National Chiao Tung University, Taiwan

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

In this talk, three efficient fast independent component analysis (FastICA) hardware designs with the modified algorithms for electroencephalogram (EEG) signal separation will be addressed. The features are summarized as follows: 1) energy-efficient FastICA using the proposed early determination scheme; 2) cost-effective FastICA using the Gram-Schmidt based whitening algorithm, and 3) online FastICA algorithm and architecture with the limited memory. The post-layout simulation results can valid the design concepts.

Speaker Biography

Lan-Da Van (S'98-M'02-SM16) received the B.S. (Honors) and the M.S. degree from Tatung Institute of Technology, Taipei, Taiwan, in 1995 and 1997, respectively, and the Ph. D. degree from National Taiwan University (NTU), Taipei, Taiwan, in 2001, all in electrical engineering. From 2001 to 2006, he was an Associate Researcher at National Chip Implementation Center (CIC), Hsinchu, Taiwan. Since Feb. 2006, he joined the faculty of the Department of Computer Science, National Chiao Tung University (NCTU), Hsinchu, Taiwan, where he is currently an Associate Professor. From 2015, he servers the Deputy Director of NCTU M2M/IoT R&D Center. His research interests are in digital signal processing and learning computation algorithms, architectures, chips, systems and applications, where this includes the design of low-power/ high-performance/ cost-effective 3-D graphics processing system, adaptive/learning systems, computer arithmetic, filters, transforms, and AI IoT/M2M applications.

Dr. Van was a recipient of the Chunghwa Picture Tube (CPT) and Motorola scholarships in 1995 and 1997, respectively. In 2005, he received the Best Poster Award in the iNEER Conference for Engineering Education and Research (iCEER). In 2014, he received the Best Paper Award in the IEEE International Conference on Internet of Things (iThings2014). He was a recipient of the Teaching Award of the Computer Science College, National Chiao Tung University in 2014. Dr. Van served as Chairman of the IEEE NTU Student Branch in 2000. In 2001, he has received the IEEE Award for outstanding leadership and service to the IEEE NTU Student Branch. From 2009 to 2010, he served as an Officer of the IEEE Taipei Section. In 2014, he was a Track Co-Chair of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). In 2016, he was a Program Co-Chair of the NCTU Forum of Technology and Application of Internet of Things. He was a Track Co-Chair of the 2018 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), a Special Session Co-Chair of the 2018 IEEE International Conference on DSP, and an Area Chair of the IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2019). In 2019, he serves as a Publicity Chair of the 32nd IEEE International System-on-Chip Conference (SOCC 2019) and serves as a Best Paper Award Committee Member of the IEEE AICAS 2019. Dr. Van served as an Associate Editor for the IEEE Transactions on Computers (2014~2018), and an Associate Editor for the Journal of Medical Imaging and Health Informatics (2014~2017), and has been serving as an Associate Editor for the IEEE Access (2018~present), and a Board Members of the Journal of Medical Imaging and Health Informatics (2017~present). In 2019, Dr. Van is graded as Taiwan Firmware Academy Fellowship.

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Bridging ICT and Medical Technologies for Smart Disease Diagnosis

Professor Myung Hoon Sunwoo, Ajou University, Korea

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Abstract

Using deep learning/artificial intelligence (DL/AI) and big data, interdisciplinary technologies of ICT and medical care are emerging and rapidly changing the paradigm of medical care and disease diagnosis and these trends are becoming more and more popular in medical care services. This talk introduces the Ultra-small-sized Diagnostic Smart Devices (uDSD) research center that consists of several universities, hospitals and companies. It investigates emerging interdisciplinary technical areas covering chip design, mobile platform-based intelligent diagnosis, deep learning/artificial intelligence (DL/AI), big data, medical imaging, etc. Currently, the center conducts joint research and development with hospitals and companies to diagnose jaundice test using smart phones, smart capsule endoscope, DL-based mammography, etc. In addition, the uDSD center can promote and contribute mobile platform-based telemedicine that will become widespread in the near future.

Speaker Biography

Myung Hoon Sunwoo received the M.S. degree in Electrical and Electronics Engineering from Korea Advanced Institute of Science and Technology (KAIST), and the Ph.D. degree from the University of Texas at Austin in Electrical and Computer Engineering. He worked for the Electronics and Telecommunications Research Institute (ETRI) in Korea and for the Digital Signal Processor Operations, Motorola, in Austin, Texas, U.S.A. Since 1992, he has been with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea, where he is currently a full Professor.

He served on the General Chair of International Symposium on Circuits and Systems (ISCAS) 2012, Seoul, the successful event held in Korea and will serve again on the General Chair of ISCAS 2021, Daegu Korea. He initiated a new IEEE Circuits and Systems Society (CASS) chapter in Daegu, Korea, which succeeded in ISCAS 2021 bidding. He has been involved in various technical activities over three decades including a member of IEEE CASS BoG (Board of Governors) (2011 - 2016), a CASS Distinguished Lecturer (2009 - 2010) and a Technical Committee member for numerous conferences. As an IEEE CASS VP-conferences, he initiated the first International Conference on Artificial Intelligence Circuits and Systems (AICAS), successfully held in Hsinchu, March 2019.

He has authored over 430 papers and also holds 90 patents and has received 45 awards. Currently, he is the Director of the micro Diagnostic Smart Devices (uDSD) Information and Telecommunication Research Center (ITRC) sponsored by Korean Government. The uDSD center consists of several universities, hospitals and companies to cover emerging interdisciplinary technical areas, such as chip design, deep learning (DL), AI, big data, medical imaging, etc. His research interests cover low power algorithms and architectures, medical devices, DL/AI, and application-specific SoC design.

He was a President of the IEIE (Institute of Electronics and Information Engineers) Semiconductor Society in Korea (2012 - 2013). He was an honorary ambassador of Korean Tourism Organization. He was a chair of IEEE CASS, Seoul Chapter (2004 - 2018). He is currently an IEEE CASS VP-Conferences and an IEEE Fellow.

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Energy-Efficient Sensor Node Processor Design for Intelligent Sensing Applications

Professor Jun Zhou, University of Electronic Science and Technology of China

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Abstract

Intelligent sensing has been widely adopted in applications including health monitoring, intelligent surveillance and smart robots. There are several common requirements for the smart sensing applications, including intelligence, real-time processing, low power consumption and miniaturization. Among them, the requirements for intelligence, real-time processing and miniaturization pose big challenge on the requirement of low power consumption. This tutorial talks about how to address the abovementioned challenge by combining innovation and optimization through the design hierarchy on algorithm, architecture and circuit levels in the design of sensor node processor for intelligent sensing applications.

Speaker Biography

Jun ZHOU, Professor of National Distinguished Youth Experts Scheme, Head of IoT Smart ICs & Systems Group, University of Electronic Science and Technology of China. His major research interests include energy-efficient algorithm & IC co-design for intelligent sensing applications. He has published more than 60 papers in prestigious conferences and journals including ISSCC, JSSC, DAC, TCAS-I, TBioCAS, and TVLSI. His work has received the IEEE Circuits & Systems Society Seoul Chapter Award and has been reported by EE Times. He is currently a senior member of IEEE, the Associate Editor of IEEE Transactions on Very Large Scale Integration System (TVLSI), the Chair of A-SSCC Digital Circuits & Systems Sub-Committee and the Chair of Embedded AI Committee of Sichuan Institute of Electronics. He has also served as OC/TPC member for a number of prestigious IEEE conferences including ICCD, ISCAS, SOCC and DSP.

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Bridging ICT and Medical Technologies for Smart Disease Diagnosis

Professor Myung Hoon Sunwoo, Ajou University, Korea

Organized by IEEE Circuits and Systems Singapore Chapter & Department of Electrical and Computer Engineering, NUS

Abstract

Using deep learning/artificial intelligence (DL/AI) and big data, interdisciplinary technologies of ICT and medical care are emerging and rapidly changing the paradigm of medical care and disease diagnosis and these trends are becoming more and more popular in medical care services. This talk introduces the Ultra-small-sized Diagnostic Smart Devices (uDSD) research center that consists of several universities, hospitals and companies. It investigates emerging interdisciplinary technical areas covering chip design, mobile platform-based intelligent diagnosis, deep learning/artificial intelligence (DL/AI), big data, medical imaging, etc. Currently, the center conducts joint research and development with hospitals and companies to diagnose jaundice test using smart phones, smart capsule endoscope, DL-based mammography, etc. In addition, the uDSD center can promote and contribute mobile platform-based telemedicine that will become widespread in the near future.

Speaker Biography

Myung Hoon Sunwoo received the M.S. degree in Electrical and Electronics Engineering from Korea Advanced Institute of Science and Technology (KAIST), and the Ph.D. degree from the University of Texas at Austin in Electrical and Computer Engineering. He worked for the Electronics and Telecommunications Research Institute (ETRI) in Korea and for the Digital Signal Processor Operations, Motorola, in Austin, Texas, U.S.A. Since 1992, he has been with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea, where he is currently a full Professor.

He served on the General Chair of International Symposium on Circuits and Systems (ISCAS) 2012, Seoul, the successful event held in Korea and will serve again on the General Chair of ISCAS 2021, Daegu Korea. He initiated a new IEEE Circuits and Systems Society (CASS) chapter in Daegu, Korea, which succeeded in ISCAS 2021 bidding. He has been involved in various technical activities over three decades including a member of IEEE CASS BoG (Board of Governors) (2011 - 2016), a CASS Distinguished Lecturer (2009 - 2010) and a Technical Committee member for numerous conferences. As an IEEE CASS VP-conferences, he initiated the first International Conference on Artificial Intelligence Circuits and Systems (AICAS), successfully held in Hsinchu, March 2019.

He has authored over 430 papers and also holds 90 patents and has received 45 awards. Currently, he is the Director of the micro Diagnostic Smart Devices (uDSD) Information and Telecommunication Research Center (ITRC) sponsored by Korean Government. The uDSD center consists of several universities, hospitals and companies to cover emerging interdisciplinary technical areas, such as chip design, deep learning (DL), AI, big data, medical imaging, etc. His research interests cover low power algorithms and architectures, medical devices, DL/AI, and application-specific SoC design.

He was a President of the IEIE (Institute of Electronics and Information Engineers) Semiconductor Society in Korea (2012 - 2013). He was an honorary ambassador of Korean Tourism Organization. He was a chair of IEEE CASS, Seoul Chapter (2004 - 2018). He is currently an IEEE CASS VP-Conferences and an IEEE Fellow.

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Neuromorphic Audition

Professor Dr. Shih-Chii Liu, Co-director, Sensors Group, Institute of Neuroinformatics, University of Zurich and ETH Zurich

Organized by VIRTUS, IC Design Center of Excellence, NTU & IEEE Circuits and Systems Singapore Chapter

Abstract

A fundamental organizing principle of brain computing enabling its amazing combination of intelligence, quick responsiveness, and low power consumption is its use of sparse spiking activity to drive computation. Recent progress in the development of higher-performance, more usable neuromorphic spike-event-based visual (DVS/ATIS/DAVIS) and auditory (AER-EAR/DAS) sensors along with versatile hardware such as FPGAs have stimulated exploration of real-time sensor processing for wearable and IoT platforms. These sensors enable "always-on" low-latency system-level response time at lower power than conventional sampled sensors. We will describe event-driven deep networks that process the sensor data, and the real-time implementation of event-driven gated recurrent unit (GRU) delta networks on an FPGA platform with state of the art power efficiency, latency, and throughput. We will demonstrate how we use these delta networks on a continuous spoken-digit speech recognition task.

Sensors Group: https://sensors.ini.uzh.ch

Speaker Biography

Shih-Chii Liu co-leads the Sensors group (https://sensors.ini.uzh.ch) at the Institute of Neuroinformatics, University of Zurich and ETH Zurich. She received the B. S. degree in electrical engineering from MIT and the Ph.D. degree in the Computation and Neural Systems program from the California Institute of Technology.

She has worked at various companies including Gould American Microsystems, LSI Logic, and Rockwell International Research Labs. Her research interests include low-power neuromorphic auditory sensors and processors; and VLSI event-driven bio-inspired processing circuits, event-driven algorithms, and deep neural networks.

Dr. Liu is past Chair of the IEEE CAS Sensory Systems and Neural Systems and Applications Technical Committees. She is current Chair of the IEEE Swiss CAS/ED Society and an associate editor of the IEEE Transactions of Biomedical Circuits and Systems and Neural Networks journal. She is general chair of 2020 IEEE Artificial Intelligence on Circuits and Systems (AICAS2020).

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Adaptive Sparse Coding for Screen Content and Image Compression

Prof. Nam LING, IEEE Fellow, Sanfilippo Family Chair Professor, Chair, Department of Computer Engineering, Santa Clara University

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Industrial Electronics Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

In this talk we will discuss rate-distortion optimized adaptive sparse coding for screen content compression in addition to natural image compression. Recently, much research has been focusing on applying machine learning approaches aiming to improve coding efficiency to another level. In this talk, we will give an overview of image/video coding and its recent progress; we will then focus on one of our group’s research using sparse coding with over-complete representation to reduce the number of coefficients representing image information, as opposed to those by a traditional transform method. Dictionary with over-complete representation can be learned from data and trained by a K-SVD (singular value decomposition) algorithm. Orthogonal matching pursuit (OMP) algorithm is then applied to select dictionary elements and their coefficients to represent the image. We propose a rate-distortion optimization (RDO) approach to select the number of non-zero coefficients given a sparsity constraint. In addition to natural image compression, we will discuss its application to screen content compression. Experimental results demonstrated very good improvement of coding efficiency by our approach over the conventional HEVC scheme. Finally, we will highlight our current research and our lab.

Speaker Biography

Nam Ling received the B.Eng. degree from the National University of Singapore and the M.S. and Ph.D. degrees from the University of Louisiana, Lafayette, U.S.A. He is currently the Sanfilippo Family Chair Professor (University Endowed Chair) of Santa Clara University (U.S.A) and the Chair of its Department of Computer Science & Engineering. From 2002 to 2010, he was an Associate Dean for its School of Engineering. He is/was also a Guest Professor for Tianjin University, a Chair Professor and Minjiang Scholar for Fuzhou University, a Cuiying Chair Professor for Lanzhou University, a Distinguished Professor for Xi’an University of Posts & Telecommunications, a Guest Professor for Shanghai Jiao Tong University, a Guest Professor for Zhongyuan University of Technology (China), and a Consulting Professor for the National University of Singapore. He has more than 210 publications (including books) in video/image coding and systolic arrays. He also has seven adopted standards contributions and has filed/granted more than 20 U.S./European/PCT patents. He is an IEEE Fellow due to his contributions to video coding algorithms and architectures. He is also an IET Fellow. He was named IEEE Distinguished Lecturer twice and was also an APSIPA Distinguished Lecturer. He received the IEEE ICCE Best Paper Award (First Place) and the IEEE Umedia Best/Excellent Paper Awards (three times). He received six awards from Santa Clara University, four at the University level (Outstanding Achievement, Recent Achievement in Scholarship, President’s Recognition, and Sustained Excellence in Scholarship) and two at the School/College level (Researcher of the Year and Teaching Excellence). He has served as Keynote Speaker for IEEE APCCAS, VCVP (twice), JCPC, IEEE ICAST, IEEE ICIEA, IET FC & U-Media, IEEE U-Media, Workshop at XUPT (twice), ICCIT, as well as a Distinguished Speaker for IEEE ICIEA. He is/was General Chair/Co-Chair for IEEE Hot Chips, VCVP (twice), IEEE ICME, IEEE U-Media (five times), and IEEE SiPS. He was an Honorary Co-Chair for IEEE Umedia. He has also served as Technical Program Co-Chair for IEEE ISCAS, APSIPA ASC, IEEE APCCAS, IEEE SiPS (twice), DCV, and IEEE VCIP. He was Technical Committee Chair for IEEE CASCOM TC and IEEE TCMM, and has served as Guest Editor/Associate Editor for IEEE TCAS-I, IEEE J-STSP, Springer JSPS, Springer MSSP, and other journals. He has delivered more than 120 invited colloquia worldwide and has served as Visiting Professor/Consultant/Scientist for many institutions/companies.

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Meta Module Generation for Fast Few-Shot Incremental Learning on Image Classification

Dr. Dongyun LIN, Research scientist, Department of Visual Intelligence, Institute for Infocomm (I2R), A*STAR, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

There are two challenging problems in applying standard Deep Neural Networks (DNNs) for incremental learning with a few examples: (i) DNNs do not perform well when little training data is available; (ii) DNNs suffer from catastrophic forgetting when used for incremental class learning. To simultaneously address both problems, we propose Meta Module Generation (MetaMG), a meta-learning method that enables a module generator to rapidly generate a category module from a few examples for a scalable classification network to recognize a new category. The old categories are not forgotten after new categories are added in. Comprehensive experiments conducted on 4 datasets show that our method is promising for fast incremental learning in few-shot setting. Further experiments on the miniImageNet dataset show that even it is not specially designed for the N-way K-shot learning problem, MetaMG can sitll perform relatively well especially for 20-way K-shot setting.

Speaker Biography

Dongyun LIN received the B.S. degree in Information Engineering in Beijing Institute of Technology (BIT), China and the Ph.D. degree from School of Electrical and Electronic Engineering in Nanyang Technological University, Singapore. He is currently working as a research scientist in the department of Visual Intelligence of Institute for Infocomm (I2R), A*STAR, Singapore. His research interests cover machine learning, computer vision, deep learning in biomedical images.

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IoT through three applications: Lighting, Electronic Shelf Label, and Heat Cost Allocators

Dr. Ramin K. Poorfard, VP (Technology) - Silicon labs

Organized by IEEE Circuits and Systems, Singapore Chapter & VIRTUS Centre of Excellence for IC Design, School of EEE, NTU

Abstract

There are lots of talks about IoT nowadays. The projection for the number of connected devices by 2020 is a staggering number. Description of what an IoT device does is usually summarized as: Sense, Compute, Control, and Connect. While this description is perfectly fine, it is too generic. In this presentation, we take a different approach.

We will take three specific IoT cases, and describe them in more details. In particular, we will describe Smart Metering, Electronic Shelf label, and Connected Lighting.  In each case, we will discuss their technical and process challenges. These challenges while somewhat specific for these applications are often found in other IoT applications as well.

Speaker Biography

Dr. Ramin K. Poorfard received his Ph.D. from University of Toronto in 1995. Upon graduation, he joined Bell Labs in March of 1995 where he was involved in the GSM base-band product development for cellular phones. He received several promotions while working at Bell Labs, the last of which was in 1999 when he was promoted to the rank of Distinguished Member of Technical Staff.

In July of 2000, he joined Silicon Laboratories Inc. as a design engineer in Austin, TX where he worked on ADSL and ADSL2+ products and later on Satellite TV receiver front ends. Starting in 2007, he architected and spear-headed the RF and Baseband design effort regarding the terrestrial TV tuner project. The project enjoyed wide acceptance in the industry (>80% market share) and significant commercial success (more than 1 Billion units sold by October 2018). He was later on promoted to the rank of Sr. Director of Engineering, where he was in charge of managing the design aspects and IC roadmap of the video line of products.

As of Feb. 2016, Ramin has assumed the role of the Vice President of Technology in the office of CTO where he oversees the roadmap and technical outlook for the Silicon labs next generation of wireless MCU’s for IoT applications. His technical interests are RF IC architectures and their building block integrations as well as mixed-signal modelling and design.

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The application of computer vision in detecting facial heart rate and respiration rate

Prof. Chuan-Yu Chang,

Chief Technology Officer, Service Systems Technology Center, Industrial Technology Research

Institute; Taiwan

Director, Intelligent Recognition Industry Service Center, YunTech, Taiwan

Distinguished Professor, National Yunlin University of Science and Technology, Taiwan

Organized by IEEE Circuits and Systems, Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

Cardiovascular disease is one of the main cause of illness and even death. Ac-cording to the 2016 statistics of causes of death from Taiwan Ministry of Health and Welfare. Heart is the most important organ of the body. It reflects the vital signs of human and also affects the physiological functions of the body. Heart rate is the most directly part of monitoring physiological information. Continuous monitoring of heart rate can provide a statistical analysis of long-term trends for physicians. With the vigorous development of information technology, the heart rate detection method can be roughly divided into two categories: contact and non-contact. The traditional contact method required paste electrodes on subject’s skin, such as electrocardiograph(ECG). However, the measuring devices need to touch the body of subjects, which may cause discomfort or irritate of body. For special groups, such as infants, elders, and patients with wound may cause a great burden on the body. In order to improve this situation, many non-contact measurements for detecting heart rate have recently been proposed, such as Doppler radar, life detectors and cameras. Among them, using cameras to measure heart beat is more suitable in daily life. There are many non-contact heartbeat detection technologies based on image had been proposed. However, their performances are suffering from the influences under complex environment such as illumination changes, non-frontal face, and so on. We proposed a non-contact heart rate and respiration detection method. It using regression tree to located the facial feature points, and tracked its trajectory. Then, separate blind source by use FastICA, select the appropriate channel for calculating heart rate. Experimental results showed that the proposed method achieves high accuracy.

Speaker Biography

Chuan-Yu Chang received the Ph.D. degree in electrical engineering from National Cheng Kung University, Taiwan, in 2000. He is currently the CTO (Chief Technology Officer) of Service Systems Technology Center, Industrial Technology Research Institute, Taiwan. He is also a Distinguished Professor at the Department of Computer Science and Information Engineering, National Yunlin University of Science and Technology, Taiwan. His current research interests include computational intelligence and their applications to medical image processing, automated optical inspection, emotion recognition, and pattern recognition. In the above areas, he has more than 200 publications in journals and conference proceedings.

Dr. Chang received the excellent paper award of the Image Processing and Pattern Recognition society of Taiwan in 1999, 2001, 2009, and 2017. He was also the recipient of the Best Paper Award in the International Computer Symposium in 1998 and 2010, the Best Paper Award in the Conference on Artificial Intelligence and Applications in 2001, 2006, 2007, and 2008, and the Best Paper Award in National Computer Symposium in 2005 and 2015. He received the Best Paper Award from the Symposium on Digital Life Technologies in 2010, 2012, and 2014. He also received the Best Paper Award from the Ninth International Conference on Intelligent Information Hiding and Multimedia Signal Processing in 2013. He served as the Program co-Chair of 2007 Conference on Artificial Intelligence and Applications, 2009 Chinese Image Processing and Pattern Recognition Society (IPPR) Conference on Computer Vision, Graphics, and Image Processing, 2010-2015 International Workshop on Intelligent Sensors and Smart Environments, and the third International Conference on Robot, Vision and Signal Processing (RVSP 2015). He served as General co-chair of 2012 International Conference on Information Security and Intelligent Control, 2011-2013 Workshop on Digital Life Technologies, CVGIP2017, WIC2018, ICS2018, and Finance co-chair of 2013 International Conference on Information, Communications and Signal Processing.

He serves as an Associate Editor for two international journals including Multidimensional Systems and Signal Processing, and International Journal of Control Theory and Applications. He is a Life Member of IPPR, TAAI, and a senior Member of IEEE. He is an IET Fellow, the chair of IEEE Signal Processing Society Tainan Chapter and the Representative for Region 10 of IEEE SPS Chapters Committee. He is currently the President of Taiwan Association for Web Intelligence Consortium.

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(CANCELLED) Design Considerations for Self-Powered Wearable Biomedical Sensor

Prof. Yong Lian, York Uinversity, Canada

Fellow of IEEE and Fellow of Academy of Engineering Singapore

President, IEEE Circuits and Systems Society

Chair, IEEE Periodicals Partnership Opportunities Committee

Organized by IEEE Circuits and Systems, Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

According to the World Health Organization’s 2008 report, the top three leading causes of death worldwide are coronary heart disease, cerebrovascular diseases, and lower respiratory infections. Governments and biomedical companies are pouring millions of dollars into research and development to find solutions for these diseases, and technological platforms to support disease management. Wireless wearable biosensors are one such platform, with their ability to measure and communicate parameters that indicate the presence, or onset, of pathology. This talk will cover several topics related to challenges in the design of self-powered wearable wireless biomedical sensor chip including regulatory requirements, skin-electrode interface, and design considerations. The focus is on the development of self-powered wearable wireless biomedical sensor SoC with embedded low power signal processing capability. Design example, such as self-powered wearable ECG sensor, will be discussed in detail.

Speaker Biography

Yong LIAN’s research interests include low power techniques, continuous-time signal processing, biomedical circuits and systems, and computationally efficient signal processing algorithms. He received more than 20 awards for his research including the 1996 IEEE Circuits and Systems Society's Guillemin-Cauer Award, the 2008 Multimedia Communications Best Paper Award from the IEEE Communications Society, 2011 IES Prestigious Engineering Achievement Award.

Dr. Lian is the President of the IEEE Circuits and Systems (CAS) Society, Chair of IEEE Periodicals Partnership Opportunities Committee, member of IEEE Periodicals Committee, member of IEEE Periodicals Review and Advisory Committee, member of IEEE Fellow Committee, member of IEEE Biomedical Engineering Award Committee, member of the IEEE Transactions on Biomedical Circuits and Systems Steering Committee. He was the Editor-in-Chief of the IEEE Transactions on Circuits and Systems II for two terms from 2010 to 2013. He served many positions in the IEEE CAS Society including Vice President for Publications, Vice President for Asia Pacific Region, Chair of the Biomedical Circuits and Systems Technical Committee, Chair of DSP Technical Committee, Distinguished Lecturer, etc. He is the founder of several conferences including BioCAS, ICGCS, and PrimeAsia.

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Physical Unclonable Function: Built-in vs Bolt-on Security Credential

Prof. Chip Hong Chang, Nanyang Technological Uinversity, Singapore

Organized by IEEE Circuits and Systems, Singapore Chapter & Teochew Doctorate Society, Singapore & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

Physical Unclonable Function (PUF) is a burgeoning security primitive for lightweight device identification and authentication due to its radically different way of interrogating hardware without the permanent presence of a secret key. The security of PUF rests in the intrinsic complexity and irreproducibility of a random physical disorder system instead of a hard-to-solve mathematical problem. Device signature generated by PUF cannot be physically replicated even by the original manufacturer due to the uncontrollable nature of manufacturing process variations. As the secret information can only be generated when the PUF is powered on, active manipulation of circuit structure will cause dysfunction of its challenge-response mechanism and become tamper evident. As unique and unclonable chip identifiers, PUFs find its niche in active hardware metering, which enables chip designers to lock and unlock the circuit functionality to gain post-fabrication control of their intellectual property and clone detection. Besides, rich variety of post-CMOS technologies, such as Phase Change Memory and Spin Transfer Torque Magnetic Random Access Memory, offer new challenges and opportunities to PUF system design. Last but not least, sensors and artificial intelligence are integral parts of an IoT ecosystem for life-changing applications. Integration of PUF credentials into sensor or machine learning circuits without compromising their original operations holds strong promises in addressing digital forensic and security problems in IoT.

Speaker Biography

Chip Hong CHANG received the B.Eng. (Hons.) degree from the National University of Singapore, in 1989, and the M. Eng. and Ph.D. degrees from Nanyang Technological University (NTU), Singapore, in 1993 and 1998, respectively. He served as a Technical Consultant in industry prior to joining the School of Electrical and Electronic Engineering (EEE), NTU, in 1999, where he is currently an Associate Professor. He holds joint appointments with the university as Assistant Chair of Alumni of the School of EEE from June 2008 to May 2014, Deputy Director of the Center for High Performance Embedded Systems from 2000 to 2011, and Program Director of the Center for Integrated Circuits and Systems from 2003 to 2009. He has coedited four books, published ten book chapters, around 100 international journal papers (~70 are IEEE) and more than 170 refereed international conference papers. His research interests include hardware security, residue and unconventional number systems, low-power arithmetic circuits, digital filter design and digital image processing. He has delivered several keynotes and more than 40 invited colloquia, including the tutorials at the 2017 Asia and South Pacific Design Automation Conference (ASP-DAC 2017) and 2017 IEEE International Symposium on Circuits and Systems (ISCAS 2017). He is the recipient of the 2006 NTU Research Outstanding and Award Recognition, 2007 British High Commission Collaboration Development Award for Microelectronics and Embedded Systems and Canada Microsystems Strategic Alliance of Quebec Collaboration Development Award, co-recipient of the PrimeAsia-2010 Gold Leaf and Silver Leaf Certificates, and coauthor of the finalist of AsianHOST 2017 Cisco best paper award, ISCAS 2015 best student paper award competition and VLSI 95 best paper award.

Dr. Chang has served as Associate Editor for the IEEE Transactions on Circuits and Systems-I from 2010-2012 and 2020-2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems since January 2011, IEEE Access since March 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems since January 2016, IEEE Transactions on Information Forensic and Security since January 2016, Springer Journal of Hardware and System Security since June 2016, Microelectronics Journal since May 2014, Integration, the VLSI Journal from 2013-2015 and the Editorial Board Member of the Journal of Electrical and Computer Engineering from 2008-2014. He also guest edited several journal special issues including IEEE Transactions on Circuits and Systems-I, IEEE Transactions on Dependable and Secure Computing, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, and served in the organizing and technical program committees of more than 60 international conferences (mostly IEEE). He is a Fellow of the IEEE and the IET.

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User Authentication Using Wi-Fi Based In-air Hand Gesture Signature

Prof. Kar-Ann Toh, Yonsei University, Korea

Organized by IEEE Circuits and Systems, Singapore Chapter & IEEE Industrial Electronics Chapter, Singapore & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Abstract

In this talk, we shall show case a system for identity verification based on the gesture signals of handwritten signature captured by the Wi-Fi CSI wave packets at different positions using transfer learning. A convolutional neural network is first pre-trained using the Wi-Fi signature signals collected from one position. Subsequently, the pre-trained feature extractor is transferred to recognize signals collected from another position via a rapid retraining process. We utilize the kernel and the range space projection learning when we retrain the transferred model. Our experimental results on an in-house Wi-Fi gesture signature signal dataset show that the signature signals from the new position can be effectively classified without needing to retrain the model from scratch.

Speaker Biography

Kar-Ann Toh is a Professor in the School of Electrical and Electronic Engineering at Yonsei University, South Korea. He received the PhD degree from Nanyang Technological University (NTU), Singapore in 1999. Since then, he worked for two years in the aerospace industry prior to his post-doctoral appointments at research centers in NTU from 1998 to 2002. He was affiliated with the Institute for Infocomm Research in Singapore from 2002 to 2005 prior to his current appointment in Korea. His research interests include pattern classification, machine learning, neural networks and biometrics. He is serving/has served as an Associate Editor of several international journals including IEEE Transactions on Biometrics, Behavior and Identity Science, IEEE Transactions on Information Forensics and Security, Journal of Franklin Institute, Pattern Recognition Letters, and IET Biometrics.

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