Nov 21, 2009 (Sat),
9 am – 1 pm
National
Electronics Museum,
1745 W NURSERY RD, LINTHICUM HEIGHTS, MD 21090
Presenter: Dan
Smith
Author: Happy Holden
A PROGRAM of ADVANCED PRINTED CIRCUIT
DESIGN:
COST, PERFORMANCE and MINIATURIZATION
Introduction To Advanced PWB Design
Abstract
DESCRIPTION: As finer pitch devices all come into common use, for higher and higher speed logic, the need for advanced printed wiring boards (PWB) is essential - - both as the board and as the package. The presentation will define how to select breakout patterns, circuit routing guidelines, manufacturing process features, microvia-HDI routing issues and techniques for widely accepted fine pitch and BGA components. 1.0 mm, 0.8 mm, 0.65 and 0.5 mm fine-pitch components are the focus of design rules and layer assignments, as well as FPGAs and ASIC to 3200 pins. Some HDI design techniques will emphasize the improved electrical performance and signal integrity. The overview of HDI technology is particularly useful for those not familiar with this technology. Participants are encouraged to bring along their technical questions for discussion.
Content
* The Need for Miniaturization in Design
* IPC Standards for Advanced Interconnects and HDI.
* IPC-2226 Design standards
* The Advantages of blind-vias & HDI with cost comparisons
* Fine-pitch and High-I/O BGA design rules, layer assignment, routing and signal-integrity issues
* Creating Boulevards to Increase Routing Density
* HDI analysis methodology
The Signal and Power Integrity (SI/PI) Performance of Adv. PWBs
DESCRIPTION: High Density Interconnects (HDI) and microvias have benefits for more than just high-density and fine-pitch BGAs. The high-frequency performance of HDI is superior to through-holes (TH) because of its lower inductance / capacitance and elimination of stubs. This presentation highlights the electrical performance benefits of HDI-microvias for not only improvements in signal integrity but reduction in power-supply impedance, resonances, current-density, decoupling capacitors and noise (power integrity). EMI/RFI improvements are also documented in examples for OEM tests.
Content
* HDI Signal Integrity Benefits: Circuit Noise Management
* HDI Power Integrity Benefits: Power Distribution Network (PDN)
* HDI Circuit Card Assembly Benefits: Eliminate 90% of Decoupling Capacitors
* HDI Circuit Card Performance Benefits: Reduce EMI/RFI
Design Features of Higher Density PWBs
DESCRIPTION: This short Seminar looks at advanced wiring technologies for high-density PWBs. Increased density is a factor of line widths, spacings, via diameter and its land, the via architecture and new thin materials that allow for the proper impedances and crosstalk. This Seminar will show how the stackup is determined and show the six (6) design features that allow wiring density of 4X what you would expect from a high-density through-hole PWB. Seven (7) of the most common HDI stackups with their advantages and disadvantages are also highlighted.
Content
* Introduction To High-Density Design Metrics
What determines the ‘best’ high-density stackups
* Via Architectures
Various blind / buried via stackups
* HDI Stackups
Seven of the most used HDI stackups
Case Studies of Design Conversion to Higher Density PWBs
DESCRIPTION: A number of successful multilayer redesigns have been accomplished where advanced technology was employed to reduce the layers, size, and costs by reducing the COMPLEXITY of the former designs. This is a talk to relate the successful Programs used by a number of large Aero/Military and Telecom OEMs to successfully implement High-Density Technologies in their Printed Circuit Board programs. The talk will outline the process and provide several examples as Case Studies.:
Content:
* Critical New HDI Design Technologies
New principles in HDI design that make multilayer simplification possible
* Overview of The Process
How is it possible to reduce layers and/or size?
* Case Studies of Successful TH To HDI Redesigns
Three examples of the successful application of this New Design Process
* Putting It All Together- "Next Step"
How to learn more about “Advanced HDI Technology”
Happy Holden
Author’s Bio
Happy Holden is the Senior PCB Technologist for Mentor Graphic’s System Design Division in Longmont, CO. He is responsible for advanced and next generation printed circuit technology consulting for Mentor’s customers and MGC engineering. Prior to joining Mentor, he was the Advanced Technology Manager at Westwood Associates and Merix Corporations. He retired from Hewlett-Packard after over 28 years. Mr. Holden formally managed Hewlett-Packard's application organizations in Taiwan and Hong Kong. His prior assignments with HP had been as director of PCB R&D. He holds degrees in Chemical Engineering and Computer Science. He is a member of the IPC, SMTA, IMAPS and the IEEE.
DAN SMITH
Presenter’s Bio
Dan
Smith has
been involved in all aspects of the PCB design process for over 30 years
(Concept through Manufacturing), and over 24 years experience using a variety
of EDA tools to design PCBs, Flex, Thick film and ICs . He has worked as a
librarian, designer, and programmer at Motorola, US Robotics, and Shure
Brothers. Smith is the author of several US software patents that have reduced
design process bottlenecks. He has taught internationally, and has co-written
training materials, industry articles, and several internal company and IPC
standards. He is a member of IPC and the IEEE.