This talk will start by analyzing the trade-offs between the two key metrics, power and performance, in modern digital circuits, and offer insights into ways to optimize the design by the proper setting of various design "knobs" such as Vdd, Vth, and sizing. The two-metric sensitivity-based optimization will then be expanded to multiple metrics, such as reliability, thermals, area, cost, etc., and will be followed by specific design methods for multi-threshold and multi-voltage circuits, adaptive circuit design using body biasing, temperature-aware design, optimal voltage scheduling, and bus encoding. The multi-threshold design methods will include a novel sleep mode state-preserving flip-flop, the multi-voltage circuit methods will include a single threshold high-performance low leakage circuit solution, the adaptive circuit design methods will include body-biasing schemes to compensate for thermal and aging effects, the optimal voltage scheduling scheme will explain why procrastination can actually save power for tasks with uncertain finishing times, while bus encoding can save power by reducing switching on global interconnect. This talk is the result of more than 100 publications, 6 patents, 8 PhD and 12 MS students, 12 years of academic and 8 years of industry experience.