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Technical
Review |
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ISSCC 2003 Survey/Editorial
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DATE/TIME
Thursday, March 6, 2003
(4:30pm to 6:00pm)
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PLACE
Glover Bldg. Rm. 201 (CSU,
Fort Collins, CO)
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JAY ACKERMAN (LSI Logic, Fort Collins, CO)
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- Highlights of Session 4 (Clock Recovery and Backplane Transceivers)
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BOB BARNES
(Agilent Technologies, Fort Collins,
CO)
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- Discussion session on Analog IP
- Discussion session on SoC (System-on-Chip)
- Paper 10.5 (Broadband ESD Protection)
- Paper 13.7 (40Gb/s CDR in 0.18um CMOS)
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STEVE BURNHAM (LSI Logic, Fort Collins, CO)
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- Session 3 (Oversampled ADCs)
- Session 7 (DACs & Amplifiers)
- Session 18 (Nyquist ADCs
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