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Technical Seminar


Reverse Engineering in the Semiconductor Industry

DATE/TIME  Wednesday, May 21, 2008 (4:30pm to 6:00pm)
PLACE  AMD Fort Collins Campus (Fort Collins, CO)
DIRECTIONS

From I-25, take Harmony Road Exit (Exit 265) westbound, and enter AMD campus on right immediately following Harmony/Ziegler intersection.  AMD is located on the NW corner of Harmony Road and Ziegler Road.  Proceed to 3rd floor for escort to seminar auditorium.  Non-AMD employees:  please arrive at 4:15pm for security sign-in and escort.

COST    Free.  As always, food & drinks will be provided.
RSVP    Send e-mail to Tin Tin Wee at tintin.wee@amd.com.

ABSTRACT
The continuous drive of Moore’s law to increase the integration level of silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns and demanding the adoption of new and more sophisticated technology to analyze chips.  The following types of analysis will be covered in detail:
  • product teardown
  • techniques used for system-level analysis, both hardware and software
  • circuit extraction, taking the chip down to the transistor level and working back up through the interconnects to create schematics
  • process analysis, looking at how the chip is made, and what it is made of

This presentation is an update of the invited paper given at the 2007 IEEE Custom Integrated Circuits Conference (CICC) with more focus on circuit extraction and cross-referencing between circuit schematics and the physical layout images obtained through scanning electron microscopy.

Chipworks further invites the membership in the Fort Collins area to contact us for a free on-site presentation about one of your competitor's devices.  Contact rtorrance@chipworks.com to discuss a report that would be of interest to your team.


PRESENTATION SLIDES  pdf

REFERENCE

WEBSITE

RANDY TORRANCE (Chipworks, Ontario, Canada)

Randy Torrance leads the Circuit Analysis team for the Technical Intelligence group at Chipworks.  During Randy’s 22 years in the technology industry, he has held senior technical and management positions in the IC design and electronic systems areas.  Prior to joining Chipworks, Randy was Director of IC Technology Development for Atmos/Mosys and was responsible for teams designing embedded memory macros.  Before that, he spent 12 years at Mosaid, where he held positions ranging from Senior Design Engineer through Manager IC Design to Director of IC Design, Switching Products.  Here, he led groups designing commodity and custom memories, and large ASICs for the graphics and networking markets.  Randy holds a BASc and MASc in Electrical Engineering from the University of Waterloo.