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Technical Seminar

From I-25, take Harmony Road Exit (Exit 265) westbound, and enter AMD campus on right immediately following Harmony/Ziegler intersection.  AMD is located on the NW corner of Harmony Road and Ziegler Road.  Proceed to 3rd floor for escort to seminar auditorium.  Non-AMD employees:  please arrive at 3:45pm for security sign-in and escort.

Integrated power gating has emerged as a primary knob for balancing the needs for high performance and low standby power during periods of circuit inactivity. This tutorial will provide an overview of various power gating techniques along with the challenges for integration in design flows for both logic and embedded SRAM. A general overview of power gating methods will be provided, including derivative techniques, trade-offs in power savings and frequency degradation, followed by power gate construction techniques, sizing and floorplan impacts, electrical analysis, IR/EM considerations, in-rush current control. Also discussed will be implications for CAD tools for electrical analysis and verification, and test.

Dr. Stephen Kosonocky is a Fellow Design Engineer at Advanced Micro Devices Research and Development Laboratory, working from Fort Collins, Colorado since 2007. His interests are in low power CPU and GPU design techniques including high current power gating, embedded regulation, low power SRAM and robust low voltage operation. Prior to AMD, he was with IBM T.J. Watson Research Center for 13 years, where he worked on embedded DRAM, SRAM, Low Power Digital Circuits and Microprocessor design, Samsung Princeton Design for 1 year, where he worked on mixed signal BiCMOS video circuits, Siemens Corporate Research in Princeton for 6 years, working on CMOS Digital and Analog circuit design. He received a BS, MS, and PhD from Rutgers University, New Brunswick, NJ, in 1986, 1991 and 1994 respectively. He has authored or co-authored 51 publications and workshops, and is an inventor on 41 Issued U.S Patents with several more pending. He has been Program Chair/co-Chair (2006/2005), General Chair/co-Chair (2008/2007), and Technical Program Committee member (2001-2008) for the Symposium on VLSI Circuits, Executive Committee Member 2005-2011 VLSI Symposia, Technical Program Committee for the 2002-2004, 2010-2011 International Solid State Circuit Conference, and Technical Program Committee for the 2001-2005 International Symposium on Low Power Electronics and Design. He was the IEEE Solid-State Circuit Society Membership Chair from 1998-2000 and a member of the IEEE Electron Device Society Membership Committee from 1997-2005, and Chair of a 1999 IEEE Technical Activities Board Focus Committee on retaining young members and IEEE Member since 1990.