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IEEE Workshop on Microelectronics and Electron Devices (WMED)

 

Boise

 

 

WMED Invited Speakers History

 

Since the inception of this workshop, we have been able to bring in the leaders from the industry and academia as invited speakers to provide insight into the state-of-the-art of technology related to micro- and nono-electronics. In recent years, we have been able to offer parallel tutorials at the workshop to promote in-depth discussions on relevant topics.

 

Here is the list of past invited speakers at WMED:

 

WMED INVITED SPEAKERS AND TOPICS

 

2002

Prof.Hiroshi Iwai, Frontier, Tokyo Institute of Technology (Keynote)

 

Eric Fossum, Micron Technology, Inc.

 

Jake Baker, Boise State University

 

Sunit Tyagi, Intel Corporation

 

Trung Doan, Micron Technology, Inc.

 

 

2004

Dr.Steven Hillenius, Agere Systems, "The Future of Silicon Microelectronics" (Keynote)

 

Dr. H. Rhodes, Micron Technology, Inc., "CMOS Imager Technology Shrinks and Image Performance"

 

Dr. Gary Bronner, IBM, "Scaling Trends in DRAM Technology"

 

Prof. Albert Wang, Illinois Institute of Technology, "A Review of RF ESD Protection Design"

 

Dr. Carlos H. Diaz, TSMC, "CMOS Technology for MS/RF SoC"

 

Prof. Paul S. Ho, University of Texas, Austin, "Packaging Effect on Reliability of Cu/low k Interconnects"

 

Prof. Junichi Murota, University of Tohuku, "Atomically Controlled Processing for Future Si-Based Devices"

 

Dr. Luan C. Tran, Micron Technology, Inc., "Beyond Nanoscale DRAM and Flash - Challenges and Opportunities for Research in Emerging Memory Devices"

 

 

2005

Prof. Paul Yu, University of California, San Diego, “Optoelectronic Devices for Wireless Broadband Communications”

 

Prof. Ilesanmi Adesida, University of Illinois, “GaN Nanoelectronics: Promises and Prospects”

 

Dr. Gennadi Bersuker, Sematech, “High-K Gate Dielectrics”

 

 

2006

Al Fazio, Intel Corporation, "Future Directions of Non-Volatile Memory Technologies" (Keynote)

 

Dennis Hess; Georgia Tech, "Preserving Low-k Dielectrics During Photoresist and Etch Residue Removal"

 

Karl Strauss, Flight Avionics Systems, Jet Propulsion Laboratory, "Lest We Never Forget: A Historical Perspective of Space Data Recorders; A Prediction for the Future"

 

Neil Goldsman; University of Maryland at College Park, "Physics Based Modeling and Design of Chips, Devices, and Nanostructures: Present and Future"

 

 

2007

Dr. Hans Stork, Sr. VP & Chief Technology Officer, Texas Instruments, "Technology Challenges for CMOS Density Scaling" (Keynote)

 

Prof. Jamal Deen, McMaster University, "Noise Issues in CMOS Devices and Circuits"

 

Prof. Juin J. Liou, University of Central Florida, "ESD Protection in CMOS Technology"

 

Dr. Prashant Majhi, SEMATECH/Intel - "CMOS Scaling Beyond High k-Metal Gates: Opportunities and Challenges"

 

Dr. Nety Krishna, Applied Materials, "The Role of Equipment and New Materials in Emerging Non-Volatile Memories"

 

 

2008

Dr. Gurtej Sandhu, Micron Technology, Inc., "Trends, Challenges and Opportunities in Semiconductor Memory Technology Scaling" (Keynote)

 

Dr. Krishna Parat, Intel Corporation, "NAND Flash Memory Scaling - Key Challenges and Future Outlook".

 

Prof. Vivek Subramanian, Univ. of California Berkeley, "Printed electronics for low-cost tags and sensors"

 

Dr. Ken MacWilliams, Applied Materials , "Emergence of double patterning and in particular self aligned double patterning for the 32nm half pitch and below"

 

Dr. Hector De Los Santos, CEO, Nano MEMS, "Nano MEMS and its Applications"

 

 

2009

Dr. Vijay Kapur, President and CEO, International Solar Electric Technology, Inc. “Commercialization of ‘Ink Based’ and Low Cost CIGS Solar Cells/Modules” (Keynote)

 

Dr. Jeffrey Welser, Director, SRC Nanoelectronics Research Initiative, “The Semiconductor Industry’s Nanoelectronics Research Initiative: Motivation and Challenges”

 

Dr. Daniel C. Edelstein, IBM Fellow and Manager, IBM T.J. Watson Research Center, “Integration/Reliability Issues for Cu/Low-k BEOL Interconnects”

 

Prof. Veena Misra, North Carolina State University, “Application of High-k Dielectrics in Memory, Power and Emerging Technologies”

 

 

INVITED TUTORIAL SPEAKERS AND TOPICS

 

2005

Prof. Jake Baker, Boise State University, “Design of High-Speed CMOS Op-Amps for Signal Processing”

 

Dr. Paul Dodd, Sandia National Laboratory, “Single-Event Effects in Scaled Technologies: Getting Down to Earth with Radiation Effects”

 

Dr. Larry Moresco, DFX Solutions “Advanced Microelectronic Packaging: Materials and Structures”

 

 

2006

Christopher L. Henderson; President, Semitracks, Inc., "Current Reliability and Failure Analysis Issues for High Volume Memory Products"

 

Nozad Karim; VP, App. Engrg. & Characterization, Amkor Technology, "3D Memory Packaging Technologies & Trends"

 

 

2007

Dr. Charlie Zhai, Advanced Micro Devices, "Stress Simulation of Semiconductor Devices and Packaging"

 

Dr. Kenneth Goodson, Stanford University "Nanoscale Thermal Management for Advanced Integrated Circuits"

 

Dr. Hanmant Belgal, Intel/IM Flash Technologies, "Reliability of Floating-Gate Flash Memories"

 

 

2008

Prof. Cary Yang, Santa Clara University, "Current Capacity of Carbon Nanofiber Interconnects".

 

Prof. Scott Dunham, University of Washington, "Utilization of atomistic computations in process modeling".

 

 

2009

Prof. Mark Lundstrom, Purdue University, “Device Physics of the Nanoscale MOSFET: An Introduction to Electronics from the Bottom Up”

 

Prof. Eric Vogel, University of Texas at Dallas, “Electrical Characterization of Advanced MOS Devices”

 

 

Workshop Sponsors

 

 

 

Boise Section

 

 

 

Boise Chapter

 

 

 

 

 

 

 

This workshop is receiving technical co-sponsorship support from the IEEE Electron Devices Society.

 

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