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Level Shifter for Triggering of High Voltage MOSFET Stack

A. Wajda, L. R. Litzko, and R. Riggs
University of Idaho
Moscow, ID, USA

Abstract:

High voltage stacks of MOSFETs capacitively triggered from a single input source have been created to enable on-chip switch mode power conversion by providing control of voltages somewhat higher than process ratings. Control of the switching devices requires a level shifter compatible with the incumbent Buck Converter design. This level shifter provides a PMOS stack of MOSFETs with a triggering signal referenced to the high voltage input rail characteristic of the Buck Converter circuit topology. Careful sizing of the pull-up and pull-down networks is crucial to ensure that the level shifter can switch states in a manner compatible with the Buck Converter’s desired voltage levels. In order to withstand the concurrently larger voltages, the Integrated Passive Research Team has developed a high voltage cascode level shifter topology. A cascode level shifter provides high currents necessary for consistent and reliable triggering of the PMOS switches at voltages compatible with a Buck Converter topology. The poster will present the design, layout, and building of this level shifter and document its performance in triggering high voltage MOSFET stacks.

 

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This workshop is receiving technical co-sponsorship support from the IEEE Electron Devices Society.

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