IEEE AP/CAS/ED/MTT/SSC Seminar

Title: Agile Hardware Design with a Generator-Based Methodology

Speaker: Professor Elad Alon
University of California, Berkeley

IEEE Solid-State Circuits Society Distinguished Lecturer

Date: August 9, 2018 from 3:00 PM to 5:00 PM

Agenda:
3:00-3:15pm Sign-In / Networking
3:15-4:45pm Presentation
4:45-5:00pm Q&A

Location: Qualcomm AZ-Auditorium (10155 Pacific Heights Blvd, San Diego, CA 92121)
Non-Qualcomm attendees: Please arrive 10-15 minutes early to find street parking or in nearby Qualcomm parking structures.

Cost: Free

Abstract:
Despite the many applications that could substantially benefit from the energy-performance achievable with an SoC implemented in an advanced process technology, the high costs of designing and verifying such an SoC using current methodologies limits their adoption to end markets greater than ~$1B in size. Not only has this prevented substantial hardware innovation in emerging markets, but even in markets large enough to bear the high initial design cost, designers are being put under constant pressure to improve their productivity given increasingly tight time-to-market constraints and product cycles. In this talk, I will describe a collaborative effort to develop an "agile" approach that aims to substantially reduce the design and verification costs of such advanced SoCs. Building on principles originally developed for agile software design, the key missing piece for hardware is that rather than focusing on developing instances, designers should focus on developing generators that facilitate re-use and enable agile validation as well as verification. As I will describe in this talk, to support this shift in approach, our team is developing technologies that enable generation of digital and analog hardware as well as the means to verify the hardware that is produced. After briefly describing each of these technologies and highlighting some of their key features, I will then briefly describe the SoC generator we have developed and used to tape-out multiple SoC demonstrators on TSMC's 16nm FFC process.

Speaker bio:
Elad Alon is a Professor of Electrical Engineering and Computer Sciences at the University of California at Berkeley, as well as a co-director of the Berkeley Wireless Research Center (BWRC). He has held advisory, consulting, or visiting positions at Ayar Labs, Locix, Lion Semiconductor, Cadence, Xilinx, Wilocity (now Qualcomm), Oracle, Intel, AMD, Rambus, Hewlett Packard, and IBM Research, where he worked on digital, analog, and mixed-signal integrated circuits for computing, test and measurement, power management, and high-speed communications. His research focuses on energy-efficient integrated systems, including the circuit, device, communications, and optimization techniques used to design them. Prof. Alon received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from Stanford University in 2001, 2002, and 2006, respectively. He received the IBM Faculty Award in 2008, the 2009 Hellman Family Faculty Fund Award, as well as the 2010 and 2017 UC Berkeley Electrical Engineering Outstanding Teaching Awards, and has co-authored papers that received the 2010 ISSCC Jack Raper Award for Outstanding Technology Directions Paper, the 2011 Symposium on VLSI Circuits Best Student Paper Award, the 2012 as well as the 2013 Custom Integrated Circuits Conference Best Student Paper Awards, and 2010-2016 Symposium on VLSI Circuits Most Frequently Cited Paper Award.