IEEE SCV-EMC 2019 Mini Symposium - Technical Exchange
Date: October 3, 2019
Venue: Embassy Suites Milpitas
Quick Links:
- Program Agenda
- Registration for Full Program
- Registration for Reception & Exhibits ONLY
- Exhibitors
- Hotel Reservation
Agenda
NOTE: There will be a 30 minute mid-morning and a mid-afternoon refreshment breaks in the exhibit hall.
Registration, Breakfast & Exhibits: 7:30 AM - 8:30 AM
Morning Session: 8:30 AM - 12:00 PM (Break 10:00 - 10:30 AM)
Pre-Layout Power Integrity through Systematic Physics-Based Design
Presenter: Dr. Jim Drewniak
Power integrity in high-speed digital designs is among the significant design challenges for high data rate and high speed systems. Best engineering practices for design of a power distribution network at the package and PCB level are well known. In practice this comes down to minimizing inductance over the current-draw path. However, there are many subtle design choices that can impact achieving a minimal power net voltage ripple or meeting a target impedance specification. In order to achieve a best design with or without constraints on some of these choices, a proven methodology for calculating the portions of inductance associated with particular geometry features is necessary, and a knowledge of inductance physics that can be exploited to achieve the design specification within a given stackup and a minimal number of decoupling capacitors. A systematic methodology has been developed for PDN design and PI analysis that can readily identify a best design given typical design constraints. A method for PDN impedance calculation will be shown, and an approach for achieving a target impedance will be given. If the target impedance specification is not met, the developed methodology can be used to immediately identify if specifications can be met with design modifications within the constraints, and provide directions in doing so in one or two iterations while avoiding trial-and-error simulations.
Lunch & Exhibits: 12:00 PM - 1:30 PM
Lunch is sponsored by:
Afternoon Session: 1:30 PM - 5:00 PM (Break 3:00 - 3:30 PM)
Locate ESD events using the speed of light!
Presenter: Doug Smith
Tracking down the sources of ESD problems in equipment can be difficult in modern electronic designs. After a brief overview of the characteristics of ESD and its effects on equipment, simple and effective troubleshooting techniques will be discussed that Mr. Smith has developed over many years of solving ESD problems. Live demonstrations will be used to illustrate some of the techniques and attendees are encouraged to participate.
Electromagnetics Made Simple – Maxwell Without the Math
Presenter: Mark Montrose
This brief tutorial examines Maxwell’s equations in a visual manner for those who never studied electromagnetic theory in college, or forgot everything years later. Engineers need to understand what the equations tell us without the need to solve complex math that provides minimal or no value to a practitioner who has to solve problems in real-time. It is easy to convert these four equations to simple algebra that allows one to visually detect where and where an EMC event may occur within a printed circuit board design and layout without the need for complex simulation. We convert the field of frequency domain analysis to the time domain as it applies to transmission line theory. How common-mode energy is created will be presented in a simplified, unique manner.
Findings on Radiated Susceptibility ABT (Audio Breakthrough)
Presenter: Sandeep Chandra
Audio Breakthrough (ABT) testing of mobile phones for conducted and radiated susceptibility is well known problem. The problem has shifted from phones to audio dongles over the years and it can be addressed through good filter design at PCB level. However, there are many subtle test conditions that a typical test lab can get it wrong during calibration of the test and during the test itself. This talk explores several variables and scenarios in test conditions, that could lead to false positives/negatives. Debugging a RI- ABT failure inside a chamber is a difficult and time consuming approach. A systematic bench-level approach method will be presented for debugging radiated immunity ABT. This bench level approach will be validated with actual chamber measurements.
New Set of EMC Challenges in Telecommunication Equipment
Presenters: Philippe Sochoux & Alpesh Bhobe
Interface speeds, densities and power continue to increase and present new sets of EMC challenges, both immunity and emissions, in Telecommunications Equipment. In this presentation we will give an overview of these challenges and how they are being mitigated. Topics will include predictive scaling to minimize early prototype quantities, how to minimize differences in conducted emission results from PSU bench level testing between various suppliers, a novel statistics-based approach to pre-test high speed optics for Radiated Emission, as well as other topics and novel solutions that can benefit the overall system design for EMC
Reception & Exhibits: 5:00 PM - 6:00 PM
Reception is sponsored by:
There will be an exhibition by vendors of EMC design, test and measurement products and services. During the reception in the exhibit area, heavy appetizers and beverages will be served. You are welcome to attend the reception only at NO CHARGE, provided a registration form is submitted in advance. Thus, if you can't join us for the entire day, drop by for the reception and exhibition to network with the speakers and attendees as well as vendors. You might even win a raffle prize! Anyone who ONLY wishes to attend the Reception & Exhibits must register here.
Biographies
Dr. James Drewniak (S¹85M¹90SM¹01F¹07) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Illinois, Urbana-Champaign, in 1985, 1987, and 1991,respectively. In 1991, he joined the Department of Electrical Engineering, Missouri University of Science and Technology (MS&T; formerly known as the University of Missouri-Rolla), Rolla, where he is currently a Faculty Member in the EMC Laboratory. His research and teaching interests include electromagnetic compatibility in high-speed digital and mixed-signal designs, signal and power integrity, electronic packaging, electromagnetic compatibility in power electronic based systems, electronics, and antenna design.
Doug Smith held an FCC First Class Radiotelephone license by age 16 and a General Class amateur radio license at age 12. He received a B.E.E.E. degree from Vanderbilt University in 1969 and an M.S.E.E. degree from the California Institute of Technology in 1970. In 1970, he joined AT&T Bell Laboratories as a Member of Technical Staff. He retired in 1996 as a Distinguished Member of Technical Staff. From February 1996 to April 2000 he was Manager of EMC Development and Test at Auspex Systems in Santa Clara, CA. Mr. Smith currently is an independent consultant specializing in high frequency measurements, circuit/system design and verification, switching power supply noise and specifications, EMC, and immunity to transient noise. He is a Senior Member of the IEEE and a former member of the IEEE EMC Society Board of Directors.
Mark Montrose is principle consultant of Montrose Compliance Services with 39 years’ experience in applied electromagnetic compatibility design, testing, troubleshooting and certification. He is a long-term past board member of the IEEE EMC Society, a past Division Director for the IEEE Board of Directors and teaches for UC Santa Cruz Extension. He has authored 5 popular engineering textbooks, his most recent being “EMC Made Simple-Printed Circuit Board and System Design”.
Sandeep Chandra received his M.S in Electrical Engineering from the University of Missouri-Rolla in 2007. He joined Ford Motor Company in 2007 and worked as a Electromagnetics Research Engineer for 8 years. He joined Google in 2016 as EMC Design Engineer. At Google he worked on several Google X projects and consumer electronic devices. He is currently EMC lead for Pixel phones at Google. His interests include electromagnetics and EMC.
Philippe Sochoux received his B.S. and M.S. degrees in electrical engineering from Marquette University, Milwaukee WI in 1990 and 1994, respectively. In 2014, he joined Juniper Networks where he is currently a Sr. Manager in EMC Design. Prior to joining Juniper, he managed functions including EMC, MDVT, ODVT, Safety, NEBS and Signal Integrity at Cisco Systems.
Alpesh Bhobe is a Sr. Manager/Sr. Technical Leader of Design for EMC/RF/OTA at Cisco Systems in San Jose, CA. He received his Ph.D. in Electrical Engineering from the University of Colorado at Boulder, Colorado in 2003. He was a Post-Doc at NIST in Boulder, Colorado from 2003-2005. While at the University of Colorado and at NIST his research interest included the development of FDTD and FEM code for EM and Microwave applications as well as in SI and EMC.
Registration Rates: |
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| IEEE member received September 1 - October 1 | $325 | |
| IEEE member received after October 1 and at door | $375 | |
| NON-IEEE member additional charge from above rate | $50 | |
| Retiree/unemployed/student (full time)* | $100 | |
| Personnel for staffing table top display only (presentations, program, and meals NOT included) | No charge | |
| Per person for personnel staffing table top display only on October 3 with ALL meals included | $60 | |
*Full time students only with valid student ID presented on site
Group Discount: Any registration of a group of 5 or more from the same company will qualify for the rate of IEEE members . Please use the above payment or contact Caroline Chan. An invoice for payment will be sent to you.
NOTE: Payment accepted onsite at the event on 10/03 as well for last minute registration. You do not need to be registered with Paypal to pay with Paypal.
Registration:
Use either the Registration Form or
via PayPal:
NOTE: The registration fee includes one copy of the technical program, continental breakfast, lunch, refreshment breaks, and the reception at the conclusion of the event. The organizing committee reserves the right to substitute speakers, restrict size, or to cancel the event and exhibition. In the event the organizing committee cancels this event, registration fees will be fully refunded.
For those of you traveling from out of town, you can get a discounted rate at the Embassy Suites Hotel . Guestroom reservations at the Hotel may be made by calling the hotel directly at (408) 942-0400. A limited number of guest rooms are being held for the “2019 IEEE SCV EMC Mini Symposium” at the rate of $259 for a standard room includes wireless internet access and breakfast, plus tax, for single or double occupancy, and are available on a first come, first serve basis until the block is sold out or the cut-off date of September 13, 2019 – whichever comes first. Book a room online with the SRP Code: ISM. Overnight parking is being reduced to $10 per night for this IEEE event.
Exhibitors:
Vendor Registration:
Fill out the Vendor Registration Form and send as PDF to the Exhibit Chair, Jerry Ramie. You can send a check or pay via PayPal.
***PayPal highly is recommended since tabletops will be secured in the order the payment is received.Contact Jerry Ramie for more information.