1999 Meetings

The linked titles of some meetings are the presentations speakers provided.

December 14, 1999: "Biological Hazards from RF Energy" by Thomas N. Cokenias & "Safety and the Use of EMI Filters" by Gary Liu

"Biological Hazards from RF Energy" Abstract: In recent weeks the media has aired stories warning cell phone users about possible links between cancer and exposure to RF and microwave energy, with countering stories that dismiss these studies as failing to show any such links. Whether or not cell phones use increases risk of contracting certain brain cancers is a matter of continuing debate and research, but it has been known since the beginning of radio science that exposure to high levels of RF can cause skin burns and tissue damage due to RF induced heating, the same way that microwave ovens elevate the temperature of food. This talk will be an overview of RF hazard testing and regulations, with some discussion of ANSI, FCC and OSHA regulations limiting RF exposure hazard, specific absorption rate (SAR), measurement equipment and techniques, and how local industries (such as semiconductor manufacturing equipment vendors and wireless system installers) are affected by the requirements of the regulatory agencies.

Bio: THOMAS N. COKENIAS is an EMC consultant from the SF Bay area. He spent 8 years as an engineer with the Equipment Authorization Branch at the FCC Laboratory in Columbia MD, working mostly with Part 15 transmitters and other unlicensed RF devices. He served 12 years as VP engineering of Electro Service Corporation, an independent EMC test laboratory in Belmont,CA, and for the last 5 years has been an independent consultant with special interests in wireless device certifications , in situ EMC testing, and helping clients prepare for laboratory accreditations. Mr. Cokenias is a member of the Ultra Wideband Working Group and serves as an officer in the Santa Clara Valley IEEE EMC Society chapter.

"Safety and the Use of EMI Filters" Abstract:

Bio: GARY LIU has a BSEE from Cal State LA, 1990. Joined UL in June of 1990. Gary worked in Sec. G the entire time, worked on products including audio, video, and tv products, some transformers and motor operated appliances, some EMI filters and havily involved in TVSS (surge suppressors) and power strip in the last few years.

November 9, 1999: "Modeling Simultaneous Switching Currents in the Z-axis Direction of VLSI Packages and PCB's. These currents are the primary source of SSO and EMI noise" by Dr. Richard Wheeler

Abstract: Dr. Wheeler will show the importance of modeling z-axis noise in VLSI packages, sockets and PCB's. This noise, also known as SSO noise, is a major contributor to high performance system failure during debug and bring up due to inadequate modeling or noise analysis during design, as well as a source for EMI. The talk will:

1. Show a theoretical basis for SSO models.
2. Include examples for SSO reduction in VLSI packages.
3. Discuss why thick PCB's are a major contributor of SSO noise.
4. Present a quantitative example using SPICE models to illustrate methodology.
5. Give practical suggestions to simplify models and shorten computer computation time.
6. Discuss Conclusions.
7. Q&A

Bio: Dr. Wheeler started his own consulting business, Wheeler Enterprises, in Nov. 1996, after managing R&D departments at Hewlett Packard Laboratories and Fujitsu Computer Packaging Technologies. He played a key role in inventing a new type of interconnect between VLSI chips and PC boards. The new interconnect will allow computer CPUs to operate at clock frequencies well above 1000 MHz. He developed the tools to predict and measure the hardware performance and submitted thirteen patent disclosures relating to high speed interconnect.

He is currently a consultant to mid and senior level management regarding CMOS design, signal integrity and VLSI packaging issues. He has over 26 years experience in industrial management, research, and hardware development, including:

• Employee 5 in startup company, managing R&D activity.
• Technology design of high speed super computers, mainframes and workstations.
• Bipolar and CMOS circuit, process and equipment design.
• High-speed networking: physical layer and OS interface.
• Authored 14 patents and a technical paper.
• Ph.D. in E.E. and Solid State Physics. He can be located at: https://www.wheeler.com

October 12, 1999: "Worldwide Standards and Directives with respect to the emerging Mutual Recognition Agreements" by Barbara Judge, Director, Compliance Certification Services

Abstract: There is great hope and great hype regarding the status of worldwide approvals as a result of MRA's that are either currently in their transitional phase, coming close to entry into force, pending, or still in egotiations. Many legislative and/or regulatory changes are needed to implement the MRA's. The US is currently making sweeping changes to the way we deal with the approvals process. I will discuss the current status of the various MRA's, the regulatory changes that we are going through, the steps that other countries are taking, some timelines, and how it will finally impact the scope of regulatory approvals.

Bio: Barbara started in this business in 1991 with Dash, Straus and Goodhue, which became Inchcape and then moved on to CCS in 1995. She represents CCS at ACIL, and USCEL. Within ACIL she is the Vice-chair of the EMC committee where her duties there include: EMC Laboratory Accreditation Working Group (ELAWG) with representatives from government (FCC, FDA, FAA, DOD, DOC, NIST, etc.), industry groups (TIA, CTIA, ITIC, SAE, etc) and accreditors (NVLAP, A2LA, SCC, ANSI, etc); the MRA Task Force, advising the Department of Commerce, Office of the US Trade Representative on issues specific to the regulatory test community in the negotiation of the various MRA's; Telecommunications Certification Body (TCB) Task Force, working closely with the FCC and industry to develop the new TCB program in accordance with FCC GEN-Docket 98-68; ATCB (Association of TCBs) Working Group to develop the framework for the new Association of TCBs. Barbara has, in the past 2 years both attended government-industry meetings to establish negotiating positions and attended actual negotiations regarding the MRA's in place between the US and the EU, and the APEC. Barbara receives regular updates on the latest status of the CITEL Agreement (The Americas) negotiations.

September 14, 1999: "Annual Social and Business Planning Session"

May 11, 1999: "SFSU Recent Research Projects" Moderator: Dr. Zorica Pantic-Tanner, Director, School of Engineering, San Francisco State University

Abstract: It has been almost 1 1/2 years since the Santa Clara Valley Chapter of the IEEE EMC Society hosted the students of San Francisco State University as they present the results of their ongoing research projects in EMC and SI (Signal Integrity). Since then, the facilities and capabilities of the SFSU Applied Electromagnetics Center of Excellence (AECE) have been greatly expanded thanks to an NSF grant, equipment donations from Lindgren, HP, SGI, and Sony, student research grants from Lockheed-Martin, and help from the numerous EMC Society members. The center now has a 750 GTEM cell, a shielded room, scalar and vector network analyzers, a 12 GHz spectrum analyzer, EMI receivers, an HP VEE based automated data aquisition system, HP and Silicon Graphics workstations, and professional grade EM modeling software including Ansoft FEM/HFSS, Cray Research LC FDTD, NEC MOM, and Spice.

The EMC concepts have been integrated throughout the EE curriclum and the expanded laboratory capability has given the students the opportunity to continue the high caliber of EMC and SI research in such diverse areas as time/frequency domain analysis of printed circuit board crosstalk mechanisms, minimization of signal integrity waveform distortions through proper transmission line source and trace termination techniques, and radiated field coupling into shielded enclosures with apertures.

Come join us for the last chapter meeting before the summer break, as Director Pantic-Tanner gives us a photographic tour of the SFSU Applied Electromagnetics Center of Excellence, followed by individual presentations of students in the areas of research indicated above.

Bio: Dr. Zorica Pantic-Tanner is currently Director of the School of Engineering at San Francisco State University where she oversees the work of 25 faculty and staff members and about 600 students in civil, electrical, and mechanical engineering. She received her B.S., M.S., and Ph.D. degrees in Electrical Engineering from the University of Nish in Yugoslavia in 1975, 1978, and 1982, respectively. She became an Assistant Professor in 1978 and an Associate Professor in 1982 in the Department of Electronic Engineering at the University of Nish. In 1984 she was awarded a Fulbright Scholarship for postdoctoral research in the area of Applied Electromagnetics. She worked in the Electromagnetics & Communications Lab of the University of Illinois at Urbana-Champaign from 1984 until 1989, first as a Fulbright Postdoctoral Fellow and then as a Visiting Scientist. In 1989 she joined the School of Engineering at San Francisco State University as an Associate Professor and in 1996 was promoted to Full Professor.

Dr. Pantic-Tanner's research and teaching interests are in the areas of Electromagnetic Field Theory, Applied Electromagnetics and Electromagnetic Compatibility. She has published over 50 conference and journal papers in these areas. In July of 1997, Dr. Pantic-Tanner received an NSF grant to improve the EMC capabilities of the Center for Applied Electromagnetics which is used for both instructional and research purposes. Dr. Pantic-Tanner is an officer of the Santa Clara Valley Chapter of the IEEE EMC Society, a member of the IEEE International EMC Education Committee, and Vice-Chair of the IEEE International EMC Numerical Modeling Committee. She developed and taught several EMC courses, for which she was awarded a Certificate of Achievement at the 1994 International EMC Symposium in Chicago.

April 13, 1999: "Solving Real World EMC Problems using the FDTD Modeling Code" by Dr. Gary Haussmann, Silicon Graphics Inc.

Abstract: Finite Difference Time Domain (FDTD) is becoming one of the most popular electromagnetic modeling techniques. The major advantages of the FDTD method include: time domain transient analysis that are useful for solving signal integrity and high speed interconnect problems; animations of the overall electrodynamic performance of structures that provide a greater visual understanding of the physics underlying the problem; and finally, by taking the Fourier transform of the time-domain results, one can readily obtain the frequency domain response using only one simulation.

The FDTD method is an explicit numerical solver for modeling vector electromagnetic wave phenomena by direct integration of Maxwell's two time-dependent curl equations. In the FDTD method, the spacial derivatives of the curl are implemented using finite difference equations in a Cartesian space mesh. The spacial and time derivatives are then implemented on a computer using a leapfrog time-space integration scheme. Using this scheme, the E-fields and H-fields are found throughout the entire analysis region at each time step. Once the fields are found, secondary values such as voltage, current, charge, electric and magnetic flux, power density, impedance, capacitance, inductance, S-parameters, and far field radiation patterns can be obtained.

The presentation will cover how the FDTD method works, and how it can be effectively used to solve real world EMC problems ranging from time-domain signal integrity problems commonly found in high speed circuit design to the more traditional frequency-domain EMC problems associated with enclosure and printed circuit board resonances, radiation through apertures, and crosstalk.

Bio: Dr. Gary Haussmann received his B.S., M.S., and Ph.D. in Electrical Engineering from the University of Colorado at Boulder. During his graduate work he specialized in numerical simulation and scientific visualization associated with electromagnetics analysis. Prior to joining the Silicon Graphics EMC group, he worked at Cray Research developing explicitly parallel schemes of the FDTD method for distributed memory parallel computers such as the Cray T3E. His current interest include the application of the FDTD method to EMC problems, 3D visualization, numerical optimization, and the Perfectly Matched Layer (PML) as a solution to FDTD boundary conditions.

March 9, 1999: "IEC 1000-4-6 Immunity Testing" by David Pomerenke, HP

Abstract: The talk will review the test methods as they are explained in the standard. Unavoidably this shows where decisions need to be made and at which points it is hardly possible to follow the standard word by word. Typical resulting implementations and setups will be provided. It will be shown how it is possible to reduce the test time by hard- and software methods. The calibration methods of different coupling devices will be explained by there equivalent circuits and the influence of simplification used is going to be pointed out. The injected current will be used to compare test results for different coupling devices (current clamp, EM-clamp etc.) under different support equipment load conditions. Most likely the discussion will point at further problems in implementing the standard, probably at some other smart solutions and will help to assess the risk of failing for different product families. Hopefully, most listeners will walk home with a better understanding of the calibration and a bunch of ideas on how to implement or improve their conducted immunity test setup.

Bio: David Pommerenke was born in Michigan in 1962. He grew up in Germany where he received his diploma in Electrical Engineering in 1989 and his Ph.D. titled "Transient Fields of ESD" at the Technical University Berlin. He continued his research and teaching activities in EMC and high voltage techniques at that University. He published 30+ papers on ESD physics, testing, high voltage partial discharge measurement techniques, RF-absorber evaluation and project oriented teaching. In 1996 he joined Hewlett Packard in Roseville, CA where he is in charge of immunity testing, test method design and EMC consulting for the Roseville Hardware Test Center. He participates in the IEC TC77B on immunity standards and works within ANSI C63.16 and the ESD Association working group 14 on ESD simulator calibration and test methods.

February 9, 1999: "New Techniques for Reducing PCB Common-Mode Radiation" by Robert Dockey, HP

Abstract: Have you ever had the experience of believing that you had done everything humanly possible to reduce the radiated emissions from an unshielded printed circuit assembly and yet still measure unacceptable margins? If so, this presentation could help explain the reasons why. Even when all of the common emission suppression measures like power supply decoupling, cable filtering, loop area control and full ground planes have been utilized, there is still one dominant coupling mechanism remaining which can be manipulated to improve the margin. Unfortunately it may also set a lower limit on the possible emission level which can be obtained from a specific design. This mechanism is referred to as "Ground Plane Voltage Gradient" contamination. This presentation will attempt to describe and analyze this radiated emission mechanism and present several design techniques which can be used to deal with it successfully.

A multi-layer printed circuit board with a "good ground plane" can produce common-mode radiation similar to a dipole antenna. This ground plane is commonly thought of as a low impedance path for returning currents and one which is of constant potential across its area. In fact, these currents give rise to voltage gradients in the plane which act as sources of common-mode current. The majority of the RF current flowing along a signal trace on a multi-layer printed circuit board (PCB) returns on the ground plane directly beneath the signal trace. However, a small portion of the ground-plane current also can return via indirect paths causing the PCB and attached cables (if present) to produce common-mode radiation similar to a dipole antenna. Several new techniques to reduce these emissions by lowering the inductance of the ground return or by bypassing the common-mode current on the cables are presented. These cost-effective techniques can be employed on two-sided or multi-layer PCBs. Previous independent work by German, Ott and Paul experimentally investigated the radiated emissions from a printed circuit board (PCB) with a digital circuit that produced current on a signal trace that returned via an adjacent ground-return trace. They demonstrated that if this two-wire transmission-line is slightly unbalanced, it will radiate as an asymmetric dipole antenna producing common-mode radiation at much greater levels than the differential-mode radiation from the current loop. A direct prediction of this radiation was later performed by Hardin, Paul and Naishadham.

In 1993, Dockey discovered that a relatively small PCB with a solid ground-plane could also produce common-mode radiation. On this truncated Microstrip transmission-line, the majority of the signal-trace current returns on the ground plane beneath the signal trace.

However, this current encounters the finite inductance of the ground plane and produces a voltage gradient. The voltage gradient, commonly called the ground-noise voltage, then causes a small portion of the signal-trace current to flow through the distributed stray capacitance of the ground plane.

This presentation will elaborate on these findings and propose several methods which can be used to effectively mitigate the radiation mechanisms.

Bio: Bob Dockey is the EMC Engineering Group manager at the Hewlett Packard division in Vancouver Washington. He has a BSEE from the University of Missouri at Rolla and is certified as an EMC engineer by the National Association of Radio and Television Engineers. He is the author of three technical papers on various EMC subjects and is a member and Distinguished Lecturer of the IEEE EMC Society.

Bob has been with Hewlett Packard for 13 years as both an EMC engineer and engineering manager. Previously, he spent 13 years as a TEMPEST engineering manager for TRW in Colorado Springs, Colo.

January 12, 1999: "Spread Spectrum Clock Techniques" by Don Bush, dBi Corporation

Abstract: Electronic emissions from an electronic device may be reduced by frequency modulating the system clock. This method, referred to as Spread Spectrum Clock Generation, or SSCG, is applicable to most microprocessor based systems. A unique waveform used to frequency modulate a digital clock signal results in a spectrum with sidebands that are nearly uniform in amplitude. This has the effect of spreading the energy of a discrete frequency or its harmonic over a wider bandwidth, thereby reducing the amplitude of each harmonic. The development and implementation of this technique will be discussed.

Bio: Don Bush worked in or managed the EMC lab at IBM Lexington, KY, from 1965 until its acquisition by Lexmark International in 1991. He worked for Lexmark from this date until March, 1996. At this time he founded dBi Corporation and continued in the EMC profession(art?). Don received the Bachelor of Electrical Engineering and Master of Electrical Engnieering Degrees from the University of Louisville, is a registered professional engineer, and a NARTE certified EMC engineer. He has authored and presented eleven papers on EMC subjects, and holds one patent. His company, dBi, is an A2LA accredited EMC test lab.