2013 Meetings
The linked titles of some meetings are the presentations speakers provided.
December 10, 2013: "High Speed Serial Link Design " Joseph C. (Jay) Diepenbrock, Lorom America
Abstract: This presentation discusses some of the key electrical properties that affect the performance of high speed serial channels and what affects them. It covers insertion and return loss, loss mechanisms, and the influences of various packaging elements including printed circuit board materials, connectors, cables, and vias. The benefits of equalization in lossy channels will be discussed. Test equipment and techniques for characterizing serial channels will be covered as well as software tools for simulating channel performance.
Bio: Joseph C. (Jay) Diepenbrock worked in a number of development areas in IBM including IC, analog and RF circuit, and backplane design. He then moved to IBM’s Integrated Supply Chain, working on the electrical specification, testing, and modeling of connectors and cables and was IBM’s Subject Matter Expert on high speed cables. After over 35 years at IBM he left there and joined the Lorom America as Senior Vice President, High Speed and is leading the Lorom Signal Integrity team and supporting its high speed product development. Mr. Diepenbrock has authored or co-authored a number of technical papers and contributed to a number of industrystandards, is a Senior Member of the IEEE, and holds 12 patents.
November 12, 2013: "Methods to Solve EMC issues on High Speed LAN Connectors " Hebberly Ahatlan, Wurth Electronics Midcom, Inc.
Abstract: Wireless devices are becoming the dominant channel for consumers to connect to the internet, but wired LAN is still the prevalent, fastest and most reliable way to transmit data. LAN connectors are now part of ever-more complex and compact designs. Therefore, LAN interfaces are exposed to a wide variety of noise sources that degrade signal transmission. In particular, high speed LAN connectors such as the 1G and 10G versions are very sensitive to noise and ESD that can severely impact their performance. In this presentation we will cover basic, but essential methods to improve noise immunity in LAN connectors.
Topics:- LAN Connector Construction and its components
- Comparison of Integrated vs Discrete Connector Solutions
- Differential Filters for LAN Applications
- Common Mode Rejection Filter Selection
- Shielding for LAN
- ESD and Surge Protection for LAN
- Additional Considerations for PoE Designs
Bio: Mr. Ahatlan has over five years of background in both analog IC and digital system product development, and has successfully solved a wide variety of EMI and EMC issues. He will introduce you to the world of EMC and will share his experience on how to fix conductive and radiated noise issues. His approach is well suited for both beginner engineers and veterans of the industry who want to reduce time debugging boards and get products to market on time.
October 17, 2013: SCV-EMC 2013 Mini-Symposium
Abstract:
" Top Ten Features of Ferrites for EMI Reduction " by Lee Hill, SILENT
High frequency ferrites seem simple but are actually widely misunderstood. In new electronic designs the best ferrite for a specific application is often not chosen, resulting in unnecessary cost or ineffective noise filtering. This interactive session will review the key attributes of ferrites intended for use on printed circuit boards and cable assemblies, and how to choose the right one for your design. Lee will present data sheets and actual applications for the control of emissions and immunity, and demonstrate the performance of different ferrite devices using digital noise sources and a spectrum analyzer/test receiver.
" Bad PCB Applications Notes on EMC and What They Did or Can Do to Your Design " by Lee Hill, SILENT
When the EMI design notes you receive from the component vendor are faulty, a noise problem will almost always be created in your product design. In fact, SILENT often discovers that bad EMI design guidelines are the root cause of many noise problems that we find while working with clients on design reviews and hardware troubleshooting assignments. In this presentation, Lee will review real-life examples of defects in schematics and PCB layouts that created noise problems in physical hardware.
" Power Distribution Network Design in Multi-layer PCBs. Part 1 - Physics and Concepts " by Prof. James Drewniak, Missouri University of Science and Technology
Fundamental concepts and physics that characterize and describe the design, performance, and limits, as well as the inductance physics and calculations that dominate the PDN performance will be presented. The outcome will be the reduction of a real production board with in excess of 20 layers used as an example, to a straight-forward physics-based equivalent circuit model where the model elements are directly related to the geometry. Then the design performance through the frequency domain PDN impedance and its accompanying time-domain voltage ripple can be related directly to the circuit elements in the model. Through this paradigm of relating the geometry features to the model topology and elements, and relating the time-domain and frequency-domain responses to the elements, both steps in a 1-to-1 fashion, a PDN design approach and trade-offs becomes clear.
" Power Distribution Network Design in Multi-layer PCBs. Part 2 - Design Methodology " by Prof. James Drewniak, Missouri University of Science and Technology
Target impedance and its time-domain manifestation in voltage ripple on the PDN will be reviewed and specified for the production board example of Part 1. Then, specifying the PWR net and its adjacent GND return layer, as well as decoupling capacitor number, value(s), and location will be detailed. Trade-offs and limitations will be discussed and quantified.
Bio: Lee Hill is Founding Partner of SILENT, an independent electromagnetic compatibility (EMC) and RF design firm established in 1992 that specializes in EMC and RF design, troubleshooting, and training services. SILENT provides these services worldwide to an average of thirty-five clients per year. Lee received the Master of Science Degree in Electrical Engineering & Electromagnetics with highest honors from the University of Missouri-Rolla, (now Missouri University of Science and Technology). He is a returning instructor for the IEEE EMC Society¹s annual Global University program and he has over twenty-five years of experience in the EMC design and retrofit of complex electronic systems. Lee has been teaching short courses on EMC design and troubleshooting for twenty years. He consults and teaches worldwide, and has presented classes in Taiwan, Singapore, Mexico, Norway, Canada, South Korea, France, and United Kingdom. He is also a regular EMC course instructor for Oxford University (England). Lee is the named inventor of three US patents for EMI control in electronic systems, and provides expert witness services for patent litigation. He is an avid motorcyclist, runner, soccer player and youth coach, table tennis player, and Amateur Radio operator. He serves as an office on the board of directors of two non-profits and a past member of the Society¹s Board of Directors (2004-2007). In 1994, Lee was appointed to serve a two year term as an IEEE EMC Society Distinguished Lecturer (DL), and from 1999-2006 he served as chair of the DL program. In the past ten years he has been a frequent featured speaker at IEEE EMC Society fundraising events in cities throughout the US including Seattle, Portland, Chicago, Milwaukee, Dallas/Fort Worth and Detroit and also provided technical presentations to Society chapters in Los Angeles, San Diego, Santa Clara, Boston, Austin, Colorado Springs, Pittsburgh, and Orange County, CA.
September 10, 2013: " BRIC: Overview of the Emerging Markets " Mark Maynard, SIEMIC, Inc.
Abstract: The growing markets in Brazil, Russia, India and China (BRIC) now are responsible for a sizable portion of the profits for most global companies. Working against this prize is a formidable maze of culture, laws, and overlapping regulations, causing confusion surrounding the regulatory requirements. If you are considering entering the BRIC marketplace with your electrical and electronic products, you need knowledge of how to obtain the necessary approvals. Whether your product is for telecommunications, computing, wireless, consumer electronics, or household appliances, you will face some distinct and unique obstacles, for which you need to be prepared. Distance, language, unfamiliar culture, and unsophisticated commercial market conditions can make this a difficult and expensive procedure for the uninformed. Come to this presentation so you can gain some insight into the processes, and learn sources of information and allies to help you navigate a safe path to compliance.
Bio: Mark Maynard is the Director of Marketing and Business Development at SIEMIC, Inc., a leading third party compliance testing and certification company, with 9 global locations. At SIEMIC Mark is responsible for compliance consulting, business and brand development, working with standards committees, professional societies and government agencies, maintaining the SIEMIC regulatory standards database, and conducting training seminars. Mark holds two degrees from Texas State University, a Bachelor of Science in Pure Mathematics and Physics, and a Bachelor of Applied Arts and Sciences in Marketing and Business. Mark was inducted as a Senior Member of the IEEE by the Central Texas EMC Society in 2005, and is NARTE Certified Product Safety Engineer. His career in electronics began in 1978 as an Electronics Warfare Intercept Systems Repairman in the US Army Intelligence and Security Command. After his honorable discharge from the Army in 1982, he worked as a chief engineer at a radio station in Lufkin, Texas, and then worked for various companies in Texas and California as a field service engineer, installing and repairing mini-computers and PC networks. Mark joined Dell, Inc. in 1988, where he worked for 20 years in international regulatory compliance and product certifications, with various positions including wireless/telecom certification engineer, EMC engineer, product safety engineer, environmental engineering program manager, and lead environmental and quality auditor. In 2008, Mark left Dell to pursue teaching mathematics and science at the university and high school levels, and this year returned to the regulatory compliance field by joining SIEMIC, Inc.
May 14, 2013: "A Practitioners Approach to EMC Testing with Reverberation Chambers " Vignesh Rajamani, Oklahoma State University
Abstract: This talk discusses the efficiency of reverberation chambers to perform emissions and immunity tests. The statistically isotropic, randomly polarized, and uniform electromagnetic environment present inside a well stirred reverberation chamber enables a robust, all aspect angle test. The controllable uncertainty of a reverberation chamber test method provides the test engineer options to design a test depending on whether the test is a simple product qualification test or a mission critical system test.
Bio: Dr. Vignesh Rajamani received his Ph. D. degree in Electrical Engineering with emphasis on Statistical Electromagnetics at Oklahoma State University in 2010. He obtained his M.S. degree in electrical engineering with emphasis on computational Electromagnetics from Oklahoma State University, Stillwater, in 2004 and B.E. degree in Electronics and Communication engineering from the University of Madras, Chennai, India, in 2002. From 2003-2010, he worked as a Research Assistant at the REFTAS Lab, Oklahoma State University. His research focuses on statistical electromagnetics, antenna engineering, RFID, reverberation chamber operations, validation, and optimization techniques. He was also involved in building the reverberation chamber at Oklahoma State University and his current research focuses estimating probability of failure of electronic systems due to electromagnetic interference and compatibility. He is an active member of IEEE EMC Society and involved with several technical committees and educational activities through EMC Society and Oklahoma State University. He is a member of Eta Kappa Nu, Phi Kappa Phi and Golden Key and a Senior member of IEEE. He is also one of the distinguished lecturers for the IEEE EMC Society for term 2013-2014. Dr. Vignesh Rajamani is the instructor of record for the Design of Engineering Systems – Electrical and Computer Engineering Capstone Design course and Introduction to Electrical Science - Sophomore level electric circuits class at Oklahoma State University.
April 09, 2013: "EMC Failure Mitigation in Impedance Land, Oh My. " by Joanna Hill, JPHill, LLC
Abstract: This presentation discusses ways to view physical conductive structures in order to enable the engineer to see the antenna structures that result in EMC failures. We learn to view physical structures not in relation to inches or meters, but in relation to wavelength. Magically, the witchcraft of EMC becomes understandable and compliance failures become far easier to fix.
Bio: Joanna was born and raised in Miami, Florida, a first generation American of Scottish heritage and a member of the Gordon clan. She was educated at Florida Institute of Technology and Georgia Tech receiving her MSEE in 1976. Starting her career with Texas Instruments in the suburbs of Houston, she came to the Detroit area to work for Burroughs in 1979 on a single user computer, the B80. After the merger with Sperry, She left the computer industry in 1986 to work for United Technologies Automotive. Over two decades ago she audited an antenna design class at the University of Michigan while working for Burroughs in Plymouth, Michigan. The instructor asked: Why are you taking my class? She told him it was to learn how to make bad antennas. She explained that in order to prevent EMC issues, we need to learn how to make bad antennas out of good ones. He took the answer pretty well. That started Joanna on a quest to understand how to design bad antennas. Along the way she learned about fractional wavelength antennas while designing automotive keyless entry receivers and transmitters. Those little Fobs have a radio transmitter inside and a fractional wavelength antenna. These small antennas taught her that a fully functional radio link could be obtained with a tiny little bad antenna. She extended the knowledge of fractional wavelength antennas to EMC and learned to recognize these antenna structures in PCBs and products. The presentation answers the question of why our products radiate harmful radio frequency emissions and how to mitigate the issues.
March 12, 2013: "Electromagnetic Interoperability Issues Working Group Final Report " by Jerry Ramie, ARC Technical Resources
Abstract:The NIST - Smart Grid Interoperability Panel (SGIP) EMI Issues Working group finished their white paper on EMC testing of utility communications products late in 2012. The report, Electromagnetic Compatibility and Smart Grid Interoperability Issues, compared the requirements for this equipment in Europe, (under IEC 61850-3), and in the United States (under IEEE-1613).Emissions requirements were essentially similar, but five "gap" immunity tests were found to be missing from the US requirements and were recommended for inclusion in the new extension of IEEE-1613:
IEC 61000-4-6 Conducted RF ImmunityIEC 61000-4-5 Surge
IEC 61000-4-16 Common Mode Disturbances
IEC 61000-4-8 Power-frequency Magnetic Fields
IEC 61000-4-10 Damped Oscillatory Magnetic Fields
A brief description of each test and the Acceptance Criteria from IEEE-1613 will be presented, along with a view of future SGIP 2.0 work in EMC. The "smart grid" is the largest technical undertaking of the new century and all communicating utility products sold in the US and Europe will have to meet essentially the same EMC testing suite. (IEEE-1613 & IEEE-1613.1 = IEC 61850-3) Companies involved in this dynamic market need to understand how EMC design and testing can help (or hinder) their movement of goods into this market.
Bio:Jerry Ramie is a 30 year veteran of the EMC, communications and power industries and has authored six books on substation EMC for the Electric Power Research Institute. (EPRI) He has published articles on grid modernization and sits on the EMC Committee of the American Radio Relay League (ARRL). He is an iNARTE-certified EMC technician, a contributor to the SGIP-EMI Issues Working Group, the IEEE-P1613.1 Working Group and is the Secretary of the ANSI-Accredited Standards Committee C63® on EMC. Jerry is a Senior Member of the IEEE and can be reached at: jramie@arctechnical.com.
February 12, 2013: "Micro and Nano miniaturization of systems " by Madhavan Swaminathan, Georgia Institute of Technology
Abstract:The main driver for the semiconductor industry has been Moore’s law where the doubling of transistors has led to phenomenal increase in functionality of the integrated circuit (IC). Today, microprocessors support a billion transistors, run at a frequency that is 250X higher than 2 decades ago and provide performance close to a super computer in a handheld device. However, integrating a System on Chip (SOC) has still not been possible due to technical and business reasons. This has led to highly integrated ICs but bulky systems. Around 2 decades back, Georgia Tech pioneered a new concept called System on Package (SOP) that enabled the miniaturization of systems consistent with Moore’s law for IC integration. A suite of technologies were developed that enabled the integration of digital, RF, optical and other functionality in the package and board that provided a significant increase in the component density at the system’s level. These components in the micro-meter scale provided ~1000X reduction in size as compared to other technologies while providing significant increase in performance and reliability while at the same time reducing the cost for manufacturing. Today, the need for including sensing and energy harvesting devices for biomedical and other electronic applications is becoming necessary. These require the integration of nano-materials, nano-sensors and nano-generators into the SOP platform. In this talk, technologies related to the micro and nano-miniaturization of systems will be discussed.
Bio: Madhavan Swaminathan is the John Pippin Chair in Electromagnetics in the School of Electrical and Computer Engineering (ECE) and Director of the Interconnect and Packaging Center, Georgia Tech and the Founder and CTO of E-System Design, a company focusing on the development of CAD tools for achieving signal and power integrity in integrated 3D micro and nano-systems. He is also the co-founder of Jacket Micro Devices, a company that specialized in integrated RF modules and substrates for wireless applications that was acquired by AVX Corporation. He formerly held the position of Joseph M. Pettit Professor in Electronics in ECE and Deputy Director of the NSF Microsystems Packaging Center at Georgia Tech. Prior to joining Georgia Tech, he was with IBM working on packaging for supercomputers. He is the author of more than 350 journal and conference publications, holds 26 patents, is the author of 3 book chapters, primary author and co-editor of 2 books - “Power Integrity Modeling and Design for Semiconductors and Systems”, Prentice Hall, Nov 2007 and “Introduction to System on Package”, MCGraw Hill, Mar. 2008 in the field of packaging and has won several awards including the Technical Excellence Award from Semiconductor Research Corporation. He is an IEEE Fellow and serves as the Distinguished Lecturer for the IEEE EMC society for the 2012 – 2013 term. He received his M.S and PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively.
January 08, 2013: "Differential Signaling Is the Opiate of the Masses " by Sam Connor, IBM
Abstract:A large concern with the proliferation of differential signaling is the false sense of security that comes along with its usage. Differential signals are hailed for their immunity to noise coupling and for their propagation characteristics. Differential receivers have great common mode rejection, and with equalization, receivers can pull meaningful signals out of a closed eye diagram. But with all of these benefits, the often forgotten drawback is that differential signals on PCBs are not truly differential and they do not perfectly cancel. The various asymmetries in the routing of the differential pair and the impedance discontinuities of vias and connectors and the imbalance and skew of the drivers all create a common mode signal on the differential pair that can cause serious EMC problems when coupled to other nets or radiated from cables and connectors.
Bio: Sam Connor (M'04 - SM'07) received his Bachelor’s Degree in Electrical Engineering from the University of Notre Dame (Indiana, USA) in 1994. For the next 2 years, he worked for Lockheed Martin as a systems engineer in the control systems group. In 1996, Sam joined IBM’s hardware compliance team in Research Triangle Park, NC. His jobs at IBM have included functional and timing verification testing, logic verification of ASICs using hardware modelers and behavioral VHDL models of standard PC interfaces, signal quality measurement and characterization, full-wave modeling and simulation of power distribution networks, I/O connectors, and data link paths in printed circuit boards, software development, and EMC design rule development and analysis. Sam is currently a Senior Technical Staff Member at IBM and is responsible for the development of EMC and signal integrity analysis tools/applications. Mr. Connor holds 3 patents and has published numerous papers in the field of computational electromagnetics, mostly applied to decoupling and high-speed signaling issues in printed circuit board designs. Papers that Sam has co-authored have won Best Paper honors at EPEP, DesignCon, and the IEEE EMC Symposium. Sam is currently serving as the chair for both TC-9 and the Eastern North Carolina Chapter of the IEEE EMC Society and is a Distinguished Lecturer for 2012-2013.