IEEE Santa Clara Valley Section  

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IEEE Magnetics Society
Santa Clara Valley Chapter
Meeting Presentation Summary




Tuesday, November 23rd, 2010

Western Digital, 1710 Automation Parkway, San Jose, CA
Directions and Map
Cookies, Conversation & Pizza too at 7:00 P.M.
Presentation at 7:30 P.M.

Recent Advances and Market Position of
Spin-Torque MRAM

Dr. Rajiv Ranjan
Avalanche Technology

Abstract

New product applications have an increasing demand for a non-volatile memory (NVM) exhibiting higher speeds, extended endurance and lower power consumption as existing solutions are not fully capable to deliver on all of these attributes. Of the group of new NVMs, Phase-change RAM (PRAM), Field-switching MRAM (Field-MRAM), Resistive RAM (RRAM) and Spin-torque based MRAM (STT-MRAM), STT-MRAM has the most attractive combination of fast read and write speed (<50ns) and high endurance (>1013) along with non-volatility.

Recent progress on spin-torque MRAM at both MTJ cell-level as well as CMOS-integrated chip levels will be reviewed. The key technical and manufacturing challenges associated with this technology will be discussed. In the technical area, the key focus area is switching current (or voltage) reduction at short pulse width (<10ns) while maintaining high magnetic bit thermal stability. Results from MTJs with novel free-layer structure achieving low-switching current while maintaining high thermal stability will be presented. In the manufacturing area, the key integration and processing issues will be highlighted.

Finally, the market positioning of the spin-torque MRAM is discussed. While it is currently being targeted for stand-alone commodity memory (replacing DRAM and flash) as well as embedded memory (replacing embedded Flash in MCU and embedded SRAM and DRAM ), new market applications such as solid state drives and embedded solutions in advanced System-on-Chips (SoCs) are also being explored. We will compare the key value add from STT-MRAM in these market segments.



Biography

Dr. Rajiv Ranjan

Photo of AUTHOR Rajiv Ranjan co-founded and has served as Chief Technology Officer at Avalanche Technology (previously Yadav Technology) since August 2006. Prior, Dr. Ranjan served as the Executive Director of R&D at Seagate where he led technology development. His pioneering efforts have led to the productization of low-noise media, perpendicular media and laser texturing. These technologies are now widely used in devices which revolutionized the data storage industry. Dr. Ranjan was recognized by the United States Congress in 2005 for his outstanding research in the field of magnetic recording, where he holds over 75 patents. Prior, he directed Komag's R&D team, and worked at Control Data Corporation as senior scientist. Dr. Ranjan received his PhD. in Material Science and Engineering from Iowa State University on a full United States Department of Energy scholarship. He received the prestigious SIMS-86 award from the Instrument Society of America for his design of a transducer for magneto-acoustic detection. Rajiv graduated from the India Institute of Technology, Kharagpur as a Silver medalist in the field of Metallurgical Engineering. He has published over 60 papers.

 

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