IEEE Signal Processing Society, Santa Clara Valley Chapter

Workshop on FPGAs for Digital Signal Processing Applications

Location: Bannan Engineering Laboratories, School of Engineering, Santa Clara University

Date: Saturday, Feb. 7, 2009

Time: 8:00am – 5:00pm

Directions to Bannan Engineering Laboratories in Santa Clara University

Driving Directions

• https://www.scu.edu/map/parking/directions.cfm

Parking Directions

• Parking is free for workshop participants, who can park at spaces marked B, E or Visitor of the garage. (Garage is indicated as “Parking Structure” below.)

Santa Clara University Campus Map (Interactive)

• https://www.scu.edu/map/index.cfm?i=32

Santa Clara University Campus Map

• Benson Center is marked by orange arrow.

Photo of Bannan Engineering Laboratories

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Webpage last modified: Jan 05, 2009