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A Framework for Design and Implementation of Adaptive Stream Mining Systems


A Framework for Design and Implementation of Adaptive Stream Mining Systems
Cost: No Charge
Date: Friday, May 24, 2013
Time: 11:00
Location: ECS 660


A FRAMEWORK FOR DESIGN AND IMPLEMENTATION OF ADAPTIVE STREAM MINING SYSTEMS With the increasing need for accurate mining and classification from multimedia data content, and the growth of such multimedia applications in mobile and distributed architectures, stream mining systems require increasing amounts of flexibility, extensibility, and adaptivity for effective deployment. In this talk, I will present a novel approach to address this challenge. This approach rigorously integrates foundations of dataflow modeling for high level signal processing system design, and adaptive stream mining based on dynamic topologies of classifiers. In particular, I will introduce a new design environment, called the lightweight dataflow for dynamic data driven adaptive systems (LiD4E) environment. LiD4E provides formal semantics, rooted in dataflow principles, for design and implementation of a broad class of multimedia stream mining topologies. I will demonstrate the capabilities of LiD4E using a face detection application that systematically adapts the type of classifier used based on dynamically changing application constraints. This work is joint with Kishan Sudusinghe, Stephen Won, and Mihaela van der Schaar. ---------------------------- Biographical sketch: Shuvra S. Bhattacharyya is a Professor in the Department of Electrical and Computer Engineering at the University of Maryland, College Park. He holds a joint appointment in the University of Maryland Institute for Advanced Computer Studies (UMIACS). He is coauthor or coeditor of six books, and the author or coauthor of over 220 papers in the areas of signal processing, embedded systems, electronic design automation, wireless communication, and wireless sensor networks. His research interests include signal processing systems and architectures; wireless sensor networks; embedded software; and hardware/software co-design. He received the B.S. degree from the University of Wisconsin at Madison, and the Ph.D. degree from the University of California at Berkeley. He has held industrial positions as a Researcher at the Hitachi America Semiconductor Research Laboratory (San Jose, California), and Compiler Developer at Kuck & Associates (Champaign, Illinois). He has held a visiting research position at the US Air Force Research Laboratory (Rome, New York). He is a Fellow of the IEEE.