Testing and Design-for-Testability Solutions for 3D Integrated Circuits

Past

Abstract Despite the numerous benefits offered by 3D integration, testing remains a major obstacle that hinders its widespread adoption. Test techniques and design-for-testability (DfT) solutions for 3D ICs have remained largely unexplored in the research community, even though experts in industry have identified a number of hard problems related to the lack of probe access for wafers, test access to modules in stacked wafers/dies, thermal concerns, and new defects arising from unique processing steps. In this talk, the speaker will present a number of testing and DfT challenges, and describe some of the solutions being advocated for these challenges. The presentation will focus on the following hot topics: o TSV defects and on-die defects induced by TSV processing; o Test generation for TSV-induced stress; o Pre-bond testing of TSVs and die logic, recent advances in probing, non-invasive test using DfT; o Post-bond testing and DfT innovations related to the optimization of die wrappers, test scheduling, and access to dies and inter-die interconnects; o Fault diagnosis and TSV repair. Biography: Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. He is also a Chair Professor at Tsinghua University, Beijing, China, a Visiting Chair Professor at National Cheng Kung University in Taiwan, and a Guest Professor at University of Bremen in Germany. Prof. Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award, the Office of Naval Research Young Investigator award, the Humboldt Research Fellowship from the Alexander von Humboldt Foundation, Germany, and several best papers awards at IEEE conferences. Prof. Chakrabarty.s current research projects include: testing and design-for-testability of integrated circuits; digital microfluidics, biochips, and cyberphysical systems; optimization of digital print and enterprise systems. He has authored 12 books on these topics (with two more books in press), published over 430 papers in journals and refereed conference proceedings, and given over 190 invited, keynote, and plenary talks. He has also presented 30 tutorials at major international conferences. Prof. Chakrabarty is a Fellow of IEEE, a Golden Core Member of the IEEE Computer Society, and a Distinguished Engineer of ACM. He holds two US patents and he has several pending patents. He was a 2009 Invitational Fellow of the Japan Society for the Promotion of Science (JSPS). He is a recipient of the 2008 Duke University Graduate School Dean.s Award for excellence in mentoring, and the 2010 Capers and Marion McDonald Award for Excellence in Mentoring and Advising, Pratt School of Engineering, Duke University. He served as a Distinguished Visitor of the IEEE Computer Society during 2005-2007 and 2010-2012, and as a Distinguished Lecturer of the IEEE Circuits and Systems Society during 2006-2007. Currently he serves as an ACM Distinguished Speaker and a Distinguished Lecturer of the IEEE Circuits and Systems Society (2012-2013). Prof. Chakrabarty served as the Editor-in-Chief of IEEE Design & Test of Computers during 2010-2012. Currently he serves as the Editor-in-Chief of ACM Journal on Emerging Technologies in Computing Systems. He is also an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Computers, IEEE Transactions on Circuits and Systems II, and IEEE Transactions on Biomedical Circuits and Systems. He serves as an Editor of the Journal of Electronic Testing: Theory and Applications (JETTA). In the recent past, he has served as Associate Editor of IEEE Transactions on VLSI Systems and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems I.