20�me conf�rence canadienne de g�nie �lectrique et informatique (CCGEI 2007)

Information
Touristique
Vancouver
Notre avenir commun 22-26 avril 2007
Sheraton Wall Centre Hotel
1088 Burrard Street, Vancouver
Colombie-Britannique, Canada

Programme technique d�taill�


Session 30: Advanced Circuits

Chair: Marek Syrzycki, Simon Fraser University
Room: Port Hardy
Time: Monday, 3:40pm-5:30pm
  
30.1 A Low-Power 75dB Digitally Programmable CMOS Variable-Gain Amplifier
Behnoosh Rahmatian,   Shahriar Mirabbasi
30.2 A 2.5 Gb/s, Low Power Clock and Data Recovery Circuit
Qingjin Du,   Jingcheng Zhuang,   Tadeusz Kwasniewski
30.3 Fractional Sigma-Delta Modulator in SiGe
Robert Sobot,   Shawn Stapleton,   Marek Syrzycki
30.4 A Low-Voltage High Linear Body-Driven Operational Transconductance Amplifier and Its Applications
Lihong Zhang,   Xuguang Zhang,   Ezz El-Masry,   Y. Zhang
30.5 A New Loadless 4-Transistor SRAM Cell with a 0.18 m CMOS Technology
J. Yang,   Li Chen
30.6 Improve the Resolution of Analog to Digital Converters with Bootstrap Method
Y. Kebbati,   H. K. Souffi

Session 62: Noise, Timing and Leakage Analysis

Chair: Marek Syrzycki, Simon Fraser University
Room: Port Hardy
Time: Tuesday, 3:40pm-5:30pm
  
62.1 Noise Analysis for UltraWideBand Low Noise Amplifiers
M. Zargham,   Vincent Gaudet
62.2 Investigation of Substrate Noise Isolation Solutions in Deep Submicron (DSM) CMOS Technology
Henry Lin,   James B. Kuo,   Robert Sobot,   Marek Syrzycki
62.3 Synthesizer Phase Noise Shape Optimization for a Multi Baud Rate Microwave Radio
L. Villeneuve,   N. Hassa�ne,   Y. Shen
62.4 Early Analysis of Timing Margins and Yield
Khaled R. Heloue,   Farid N. Najm

Session 91: Advanced Circuits

Chair: Anh Dinh, University of Saskatchewan
Room: Junior Ballroom D
Time: Wednesday, 3:40pm-5:30pm
  
91.1 Using Keeper Control and Body Bias for Fine Grained Threshold Voltage Compensation in Dynamic Logic
Navid Azizi,   Farid N. Najm
91.2 Low-Voltage Single-Phase Clocked Quasi-Adiabatic Pass-Gate Logic
Edward K. Loo,   Harry I. Chen,   James B. Kuo,   Marek Syrzycki
91.3 Flexible Ultra Low Power Successive Approximation Analog-to-Digital Converter with Asynchronous Clock Generator
Rafal Dlugosz,   Vincent Gaudet,   Kris Iniewski
91.4 An Extreme Low Power Galois Field Inversion Circuit
Anh Dinh,   Daniel Teng,   Bi Pham
91.5 Optimized Design Methodology for an Integration of Electrical Control Systems
Y. Kebbati,   H. K. Souffi

Session 92: Advanced Technologies

Chair: Tadeusz Kwasniewski, Carleton Unversity
Room: Parksville
Time: Wednesday, 3:40pm-5:30pm
  
92.1 A 40-GHz Quadrature LC VCO in 90-nm CMOS Technology
Muhammad Usama,   Tadeusz Kwasniewski
92.2 Fabrication and Characterization of Nickel Amorphous Silicon Metal-Semiconductor-Metal Photoconductors
Farhad Taghibakhsh,   Karim S. Karim
92.3 Exposure and Development of Poly (methyl methacrylate) using 254nm Light Source and IPA/water
Robert W. Johnstone,   Ian G. Foulds,   M. Parameswaran
92.4 Triple-Threshold Static Power Minimization Technique in High-Level Synthesis for Designing High-Speed Low-Power SOC Applications Using 90nm MTCMOS Technology
Harry I. Chen,   Edward K. Loo,   James B. Kuo,   Marek Syrzycki
92.5 EM Methods for Full-Wave Characterization of Microwave Integrated Circuits
M.C.E. Yagoub,   M.L. Tounsi,   T.P. Vuong



Commandit� par l'IEEE Canada et les sections IEEE Vancouver et IEEE Victoria.
derni�re mise � jour: 2007-4-19 par webmestre