Wednesday, March 21, 2007
IEEE Circuits and Systems, Dallas Chapter:   Seminar
https://ewh.ieee.org/soc/cas/dallas/ 
 

IEEE Circuits and Systems, Dallas Chapter:   Seminar

Title: Research on Extending and Surpassing the Limits of CMOS

Presenter:  Dr. Robert R. Doering, Senior Fellow,

Texas Instruments Inc., Dallas, TX

Date: Wednesday March 21, 2007. 6:30pm, Refreshments; 7:00pm, Program

Location: Dallas Texins Activities Center, Conf Room 1 (North end of  Texas Instruments expressway site, 13900 N Central Expw.; site  entrance on north-bound access road, between Midpark Rd. & Spring Valley Rd.)

Abstract:

The International Technology Roadmap for Semiconductors (ITRS) provides an annual rolling update of consensus on the currently-perceived limits of CMOS technology, as well as on potential solutions to the corresponding challenges. Today, the 15-year horizon of the ITRS is pushing into what most technologists believe will need to be a “beyond CMOS” era if we are still to be making progress anywhere near historical rates in integrated-circuit performance, energy efficiency, and cost. The challenge of identifying computation/communication technologies which might supercede CMOS is a great opportunity for university research supported and guided by the semiconductor industry. Thus, the Semiconductor Industry Association (SIA) has recently established the NanoElectronics Research Corporation (NERC), which administers a university research program called the Nanoelectronics Research Initiative (NRI). In partnership with federal and state government agencies, the six member companies of NERC are currently funding three new “regional” NRI centers and supplementing the funding of several pre-existing NSF centers. Much of the initial research in these centers is directed at the possibility of using spin rather than charge as the state variable of computation. However, several other state variables are also being pursued, and there is a great deal of enthusiasm and excitement among the participants from academia, government, and industry in this new research endeavor.

Dr. ROBERT R. DOERING

Texas Instruments

P.O. Box 650311, MS 3737

Dallas, Texas 75265

Phone: (972) 995-2405

Fax: (972) 995-1480

E-Mail: doering@ti.com

Brief Biography

Dr. Doering is a Senior Fellow and Technology Strategy Manager at Texas Instruments. He is also a member of TI’s Technical Advisory Board. His previous positions at TI include: Manager of Future-Factory Strategy, Director of Scaled-Technology Integration, and Director of the Microelectronics Manufacturing Science and Technology (MMST) Program. The MMST Program was a 5-year R&D effort, funded by DARPA, the U.S. Air Force, and Texas Instruments, which developed a wide range of new technologies for advanced semiconductor manufacturing. The major highlight of the program was the demonstration, in 1993, of sub-3-day cycle time for manufacturing 350-nm CMOS integrated circuits. This was principally enabled by the development of 100% single-wafer processing.

He received a B.S. degree in physics from the Massachusetts Institute of Technology in 1968 and a Ph.D. in physics from Michigan State University in 1974. He joined TI in 1980, after several years on the faculty of the Physics Department at the University of Virginia. His physics research was on nuclear reactions and was highlighted by the discovery of the Giant Spin-Isospin Resonance in heavy nuclei in 1973 and by pioneering experiments in medium-energy heavy-ion reactions in the late 70’s. His early work at Texas Instruments was on SRAM, DRAM, and NMOS/CMOS device physics and process-flow design. Management responsibilities during his first 10 years at TI included advanced lithography and plasma etch as well as CMOS and DRAM technology development.

Dr. Doering is an IEEE Fellow and chair of the Semiconductor Manufacturing Technical Committee of the IEEE Electron Devices Society. He represents Texas Instruments on many industry committees, including: the Technology Strategy Committee of the Semiconductor Industry Association, the Board of Directors of the Semiconductor Research Corporation, the Technical Program Group of the Nanoelectronics Research Corporation, and the Corporate Associates Advisory Committee of the American Institute of Physics. Dr. Doering is also a founder of the International Technology Roadmap for Semiconductors and one of the two U.S. representatives to the International Roadmap Committee, which governs the ITRS. He has authored/presented over 150 publications and invited papers/talks and has 20 U.S. patents.